mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 19:23:23 +01:00
62e22a5a7e
This adds the llvm.abs(), llvm.umin(), llvm.umax(), llvm.smin(), and llvm.smax() intrinsics specified in D81829. For SelectionDAG, the ISD opcodes and all the legalization and lowering already exist, so this just wires them up to the intrinsic in the SDAG builder and adds rudimentary tests. For GlobalISel only the min/max intrinsics are wired up, as llvm.abs() will require the addition of a G_ABS op, and corresponding legalization support. Differential Revision: https://reviews.llvm.org/D84125
657 lines
21 KiB
LLVM
657 lines
21 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64,SSE
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; RUN: llc < %s -mtriple=x86_64-linux -mattr=avx | FileCheck %s --check-prefixes=X64,AVX,AVX1
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; RUN: llc < %s -mtriple=x86_64-linux -mattr=avx2 | FileCheck %s --check-prefixes=X64,AVX,AVX2
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; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
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declare i8 @llvm.smin.i8(i8, i8)
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declare i16 @llvm.smin.i16(i16, i16)
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declare i24 @llvm.smin.i24(i24, i24)
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declare i32 @llvm.smin.i32(i32, i32)
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declare i64 @llvm.smin.i64(i64, i64)
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declare i128 @llvm.smin.i128(i128, i128)
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declare <1 x i32> @llvm.smin.v1i32(<1 x i32>, <1 x i32>)
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declare <2 x i32> @llvm.smin.v2i32(<2 x i32>, <2 x i32>)
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declare <3 x i32> @llvm.smin.v3i32(<3 x i32>, <3 x i32>)
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declare <4 x i32> @llvm.smin.v4i32(<4 x i32>, <4 x i32>)
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declare <8 x i32> @llvm.smin.v8i32(<8 x i32>, <8 x i32>)
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declare <8 x i16> @llvm.smin.v8i16(<8 x i16>, <8 x i16>)
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declare <16 x i8> @llvm.smin.v16i8(<16 x i8>, <16 x i8>)
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define i8 @test_i8(i8 %a, i8 %b) nounwind {
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; X64-LABEL: test_i8:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: cmpb %al, %dil
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; X64-NEXT: cmovll %edi, %eax
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_i8:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: cmpb %al, %cl
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; X86-NEXT: cmovll %ecx, %eax
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; X86-NEXT: # kill: def $al killed $al killed $eax
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; X86-NEXT: retl
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%r = call i8 @llvm.smin.i8(i8 %a, i8 %b)
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ret i8 %r
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}
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define i16 @test_i16(i16 %a, i16 %b) nounwind {
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; X64-LABEL: test_i16:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: cmpw %ax, %di
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; X64-NEXT: cmovll %edi, %eax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_i16:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: cmpw %ax, %cx
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; X86-NEXT: cmovll %ecx, %eax
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; X86-NEXT: # kill: def $ax killed $ax killed $eax
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; X86-NEXT: retl
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%r = call i16 @llvm.smin.i16(i16 %a, i16 %b)
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ret i16 %r
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}
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define i24 @test_i24(i24 %a, i24 %b) nounwind {
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; X64-LABEL: test_i24:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: shll $8, %esi
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; X64-NEXT: sarl $8, %esi
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; X64-NEXT: shll $8, %eax
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; X64-NEXT: sarl $8, %eax
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; X64-NEXT: cmpl %esi, %eax
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; X64-NEXT: cmovgel %esi, %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_i24:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: shll $8, %ecx
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; X86-NEXT: sarl $8, %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shll $8, %eax
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; X86-NEXT: sarl $8, %eax
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; X86-NEXT: cmpl %ecx, %eax
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; X86-NEXT: cmovgel %ecx, %eax
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; X86-NEXT: retl
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%r = call i24 @llvm.smin.i24(i24 %a, i24 %b)
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ret i24 %r
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}
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define i32 @test_i32(i32 %a, i32 %b) nounwind {
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; X64-LABEL: test_i32:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: cmpl %esi, %edi
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; X64-NEXT: cmovll %edi, %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_i32:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: cmpl %eax, %ecx
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; X86-NEXT: cmovll %ecx, %eax
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; X86-NEXT: retl
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%r = call i32 @llvm.smin.i32(i32 %a, i32 %b)
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ret i32 %r
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}
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define i64 @test_i64(i64 %a, i64 %b) nounwind {
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; X64-LABEL: test_i64:
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; X64: # %bb.0:
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; X64-NEXT: movq %rsi, %rax
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; X64-NEXT: cmpq %rsi, %rdi
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; X64-NEXT: cmovlq %rdi, %rax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_i64:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: cmpl %eax, %ecx
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; X86-NEXT: movl %eax, %edi
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; X86-NEXT: cmovbl %ecx, %edi
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; X86-NEXT: cmpl %edx, %esi
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; X86-NEXT: cmovll %ecx, %eax
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; X86-NEXT: cmovel %edi, %eax
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; X86-NEXT: cmovll %esi, %edx
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl
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%r = call i64 @llvm.smin.i64(i64 %a, i64 %b)
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ret i64 %r
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}
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define i128 @test_i128(i128 %a, i128 %b) nounwind {
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; X64-LABEL: test_i128:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdx, %rax
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; X64-NEXT: cmpq %rdx, %rdi
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; X64-NEXT: cmovbq %rdi, %rdx
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; X64-NEXT: cmpq %rcx, %rsi
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; X64-NEXT: cmovlq %rdi, %rax
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; X64-NEXT: cmoveq %rdx, %rax
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; X64-NEXT: cmovlq %rsi, %rcx
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; X64-NEXT: movq %rcx, %rdx
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; X64-NEXT: retq
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;
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; X86-LABEL: test_i128:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: subl $8, %esp
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: cmpl %ecx, %eax
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; X86-NEXT: movl %ecx, %ebx
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; X86-NEXT: cmovbl %eax, %ebx
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; X86-NEXT: cmpl %esi, %edi
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; X86-NEXT: movl %ecx, %ebp
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; X86-NEXT: cmovbl %eax, %ebp
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; X86-NEXT: cmovel %ebx, %ebp
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: cmovbl %edi, %eax
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; X86-NEXT: movl %eax, (%esp) # 4-byte Spill
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: cmpl %edx, %edi
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; X86-NEXT: movl %edx, %eax
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; X86-NEXT: cmovbl %edi, %eax
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; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X86-NEXT: movl %ebx, %edi
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; X86-NEXT: sbbl %eax, %edi
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; X86-NEXT: cmovll {{[0-9]+}}(%esp), %esi
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; X86-NEXT: cmovll {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl %ebx, %edi
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; X86-NEXT: xorl %eax, %edi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X86-NEXT: xorl %edx, %ebx
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; X86-NEXT: orl %edi, %ebx
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; X86-NEXT: cmovel %ebp, %ecx
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; X86-NEXT: cmovel (%esp), %esi # 4-byte Folded Reload
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: cmpl %eax, %edi
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; X86-NEXT: cmovll {{[0-9]+}}(%esp), %edx
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; X86-NEXT: cmovel {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
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; X86-NEXT: cmovll %edi, %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: movl %eax, 12(%edi)
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; X86-NEXT: movl %edx, 8(%edi)
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; X86-NEXT: movl %esi, 4(%edi)
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; X86-NEXT: movl %ecx, (%edi)
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; X86-NEXT: movl %edi, %eax
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; X86-NEXT: addl $8, %esp
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: retl $4
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%r = call i128 @llvm.smin.i128(i128 %a, i128 %b)
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ret i128 %r
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}
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define <1 x i32> @test_v1i32(<1 x i32> %a, <1 x i32> %b) nounwind {
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; X64-LABEL: test_v1i32:
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; X64: # %bb.0:
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: cmpl %esi, %edi
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; X64-NEXT: cmovll %edi, %eax
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; X64-NEXT: retq
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;
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; X86-LABEL: test_v1i32:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: cmpl %eax, %ecx
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; X86-NEXT: cmovll %ecx, %eax
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; X86-NEXT: retl
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%r = call <1 x i32> @llvm.smin.v1i32(<1 x i32> %a, <1 x i32> %b)
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ret <1 x i32> %r
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}
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define <2 x i32> @test_v2i32(<2 x i32> %a, <2 x i32> %b) nounwind {
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; SSE-LABEL: test_v2i32:
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; SSE: # %bb.0:
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; SSE-NEXT: movdqa %xmm1, %xmm2
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; SSE-NEXT: pcmpgtd %xmm0, %xmm2
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; SSE-NEXT: pand %xmm2, %xmm0
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; SSE-NEXT: pandn %xmm1, %xmm2
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; SSE-NEXT: por %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test_v2i32:
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; AVX: # %bb.0:
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; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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; X86-LABEL: test_v2i32:
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; X86: # %bb.0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: cmpl %eax, %esi
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; X86-NEXT: cmovll %esi, %eax
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; X86-NEXT: cmpl %edx, %ecx
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; X86-NEXT: cmovll %ecx, %edx
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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%r = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %a, <2 x i32> %b)
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ret <2 x i32> %r
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}
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define <3 x i32> @test_v3i32(<3 x i32> %a, <3 x i32> %b) nounwind {
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; SSE-LABEL: test_v3i32:
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; SSE: # %bb.0:
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; SSE-NEXT: movdqa %xmm1, %xmm2
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; SSE-NEXT: pcmpgtd %xmm0, %xmm2
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; SSE-NEXT: pand %xmm2, %xmm0
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; SSE-NEXT: pandn %xmm1, %xmm2
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; SSE-NEXT: por %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test_v3i32:
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; AVX: # %bb.0:
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; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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; X86-LABEL: test_v3i32:
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; X86: # %bb.0:
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X86-NEXT: cmpl %eax, %ebx
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; X86-NEXT: cmovll %ebx, %eax
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; X86-NEXT: cmpl %edx, %edi
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; X86-NEXT: cmovll %edi, %edx
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; X86-NEXT: cmpl %ecx, %esi
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; X86-NEXT: cmovll %esi, %ecx
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: retl
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%r = call <3 x i32> @llvm.smin.v3i32(<3 x i32> %a, <3 x i32> %b)
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ret <3 x i32> %r
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}
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define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
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; SSE-LABEL: test_v4i32:
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; SSE: # %bb.0:
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; SSE-NEXT: movdqa %xmm1, %xmm2
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; SSE-NEXT: pcmpgtd %xmm0, %xmm2
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; SSE-NEXT: pand %xmm2, %xmm0
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; SSE-NEXT: pandn %xmm1, %xmm2
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; SSE-NEXT: por %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test_v4i32:
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; AVX: # %bb.0:
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; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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; X86-LABEL: test_v4i32:
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; X86: # %bb.0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: cmpl %edi, %eax
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; X86-NEXT: cmovll %eax, %edi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: cmpl %esi, %eax
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; X86-NEXT: cmovll %eax, %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: cmpl %edx, %eax
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; X86-NEXT: cmovll %eax, %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: cmpl %ecx, %eax
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; X86-NEXT: cmovll %eax, %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl %ecx, 12(%eax)
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; X86-NEXT: movl %edx, 8(%eax)
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; X86-NEXT: movl %esi, 4(%eax)
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; X86-NEXT: movl %edi, (%eax)
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl $4
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%r = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %a, <4 x i32> %b)
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ret <4 x i32> %r
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}
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define <8 x i32> @test_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
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; SSE-LABEL: test_v8i32:
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; SSE: # %bb.0:
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; SSE-NEXT: movdqa %xmm2, %xmm4
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; SSE-NEXT: pcmpgtd %xmm0, %xmm4
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; SSE-NEXT: pand %xmm4, %xmm0
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; SSE-NEXT: pandn %xmm2, %xmm4
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; SSE-NEXT: por %xmm4, %xmm0
|
|
; SSE-NEXT: movdqa %xmm3, %xmm2
|
|
; SSE-NEXT: pcmpgtd %xmm1, %xmm2
|
|
; SSE-NEXT: pand %xmm2, %xmm1
|
|
; SSE-NEXT: pandn %xmm3, %xmm2
|
|
; SSE-NEXT: por %xmm2, %xmm1
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX1-LABEL: test_v8i32:
|
|
; AVX1: # %bb.0:
|
|
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
|
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
|
|
; AVX1-NEXT: vpminsd %xmm2, %xmm3, %xmm2
|
|
; AVX1-NEXT: vpminsd %xmm1, %xmm0, %xmm0
|
|
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
|
|
; AVX1-NEXT: retq
|
|
;
|
|
; AVX2-LABEL: test_v8i32:
|
|
; AVX2: # %bb.0:
|
|
; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0
|
|
; AVX2-NEXT: retq
|
|
;
|
|
; X86-LABEL: test_v8i32:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: pushl %ebp
|
|
; X86-NEXT: pushl %ebx
|
|
; X86-NEXT: pushl %edi
|
|
; X86-NEXT: pushl %esi
|
|
; X86-NEXT: subl $8, %esp
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpl %ebp, %eax
|
|
; X86-NEXT: cmovll %eax, %ebp
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpl %ebx, %eax
|
|
; X86-NEXT: cmovll %eax, %ebx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpl %edi, %eax
|
|
; X86-NEXT: cmovll %eax, %edi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpl %esi, %eax
|
|
; X86-NEXT: cmovll %eax, %esi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpl %edx, %eax
|
|
; X86-NEXT: cmovll %eax, %edx
|
|
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpl %ecx, %eax
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, (%esp) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpl %ecx, %eax
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
; X86-NEXT: cmpl %eax, %edx
|
|
; X86-NEXT: cmovll %edx, %eax
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
; X86-NEXT: movl %eax, 28(%edx)
|
|
; X86-NEXT: movl %ecx, 24(%edx)
|
|
; X86-NEXT: movl (%esp), %eax # 4-byte Reload
|
|
; X86-NEXT: movl %eax, 20(%edx)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
|
|
; X86-NEXT: movl %eax, 16(%edx)
|
|
; X86-NEXT: movl %esi, 12(%edx)
|
|
; X86-NEXT: movl %edi, 8(%edx)
|
|
; X86-NEXT: movl %ebx, 4(%edx)
|
|
; X86-NEXT: movl %ebp, (%edx)
|
|
; X86-NEXT: movl %edx, %eax
|
|
; X86-NEXT: addl $8, %esp
|
|
; X86-NEXT: popl %esi
|
|
; X86-NEXT: popl %edi
|
|
; X86-NEXT: popl %ebx
|
|
; X86-NEXT: popl %ebp
|
|
; X86-NEXT: retl $4
|
|
%r = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %a, <8 x i32> %b)
|
|
ret <8 x i32> %r
|
|
}
|
|
|
|
define <8 x i16> @test_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
|
|
; SSE-LABEL: test_v8i16:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: pminsw %xmm1, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: test_v8i16:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; X86-LABEL: test_v8i16:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: pushl %ebp
|
|
; X86-NEXT: pushl %ebx
|
|
; X86-NEXT: pushl %edi
|
|
; X86-NEXT: pushl %esi
|
|
; X86-NEXT: subl $8, %esp
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpw %bp, %ax
|
|
; X86-NEXT: cmovll %eax, %ebp
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpw %bx, %ax
|
|
; X86-NEXT: cmovll %eax, %ebx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpw %di, %ax
|
|
; X86-NEXT: cmovll %eax, %edi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpw %si, %ax
|
|
; X86-NEXT: cmovll %eax, %esi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpw %dx, %ax
|
|
; X86-NEXT: cmovll %eax, %edx
|
|
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpw %cx, %ax
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, (%esp) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpw %dx, %ax
|
|
; X86-NEXT: cmovll %eax, %edx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: cmpw %ax, %cx
|
|
; X86-NEXT: cmovll %ecx, %eax
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movw %ax, 14(%ecx)
|
|
; X86-NEXT: movw %dx, 12(%ecx)
|
|
; X86-NEXT: movl (%esp), %eax # 4-byte Reload
|
|
; X86-NEXT: movw %ax, 10(%ecx)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
|
|
; X86-NEXT: movw %ax, 8(%ecx)
|
|
; X86-NEXT: movw %si, 6(%ecx)
|
|
; X86-NEXT: movw %di, 4(%ecx)
|
|
; X86-NEXT: movw %bx, 2(%ecx)
|
|
; X86-NEXT: movw %bp, (%ecx)
|
|
; X86-NEXT: movl %ecx, %eax
|
|
; X86-NEXT: addl $8, %esp
|
|
; X86-NEXT: popl %esi
|
|
; X86-NEXT: popl %edi
|
|
; X86-NEXT: popl %ebx
|
|
; X86-NEXT: popl %ebp
|
|
; X86-NEXT: retl $4
|
|
%r = call <8 x i16> @llvm.smin.v8i16(<8 x i16> %a, <8 x i16> %b)
|
|
ret <8 x i16> %r
|
|
}
|
|
|
|
define <16 x i8> @test_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
|
|
; SSE-LABEL: test_v16i8:
|
|
; SSE: # %bb.0:
|
|
; SSE-NEXT: movdqa %xmm1, %xmm2
|
|
; SSE-NEXT: pcmpgtb %xmm0, %xmm2
|
|
; SSE-NEXT: pand %xmm2, %xmm0
|
|
; SSE-NEXT: pandn %xmm1, %xmm2
|
|
; SSE-NEXT: por %xmm2, %xmm0
|
|
; SSE-NEXT: retq
|
|
;
|
|
; AVX-LABEL: test_v16i8:
|
|
; AVX: # %bb.0:
|
|
; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm0
|
|
; AVX-NEXT: retq
|
|
;
|
|
; X86-LABEL: test_v16i8:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: pushl %ebp
|
|
; X86-NEXT: pushl %ebx
|
|
; X86-NEXT: pushl %edi
|
|
; X86-NEXT: pushl %esi
|
|
; X86-NEXT: subl $40, %esp
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %bl, %al
|
|
; X86-NEXT: cmovll %eax, %ebx
|
|
; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %dl, %al
|
|
; X86-NEXT: cmovll %eax, %edx
|
|
; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, (%esp) # 4-byte Spill
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, %ebp
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, %edi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl %ecx, %esi
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %bl, %al
|
|
; X86-NEXT: cmovll %eax, %ebx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %dl, %al
|
|
; X86-NEXT: cmovll %eax, %edx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: cmpb %cl, %al
|
|
; X86-NEXT: cmovll %eax, %ecx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: movb %cl, 15(%eax)
|
|
; X86-NEXT: movb %dl, 14(%eax)
|
|
; X86-NEXT: movb %bl, 13(%eax)
|
|
; X86-NEXT: movl %esi, %ecx
|
|
; X86-NEXT: movb %cl, 12(%eax)
|
|
; X86-NEXT: movl %edi, %ecx
|
|
; X86-NEXT: movb %cl, 11(%eax)
|
|
; X86-NEXT: movl %ebp, %ecx
|
|
; X86-NEXT: movb %cl, 10(%eax)
|
|
; X86-NEXT: movl (%esp), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, 9(%eax)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, 8(%eax)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, 7(%eax)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, 6(%eax)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, 5(%eax)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, 4(%eax)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, 3(%eax)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, 2(%eax)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, 1(%eax)
|
|
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
|
; X86-NEXT: movb %cl, (%eax)
|
|
; X86-NEXT: addl $40, %esp
|
|
; X86-NEXT: popl %esi
|
|
; X86-NEXT: popl %edi
|
|
; X86-NEXT: popl %ebx
|
|
; X86-NEXT: popl %ebp
|
|
; X86-NEXT: retl $4
|
|
%r = call <16 x i8> @llvm.smin.v16i8(<16 x i8> %a, <16 x i8> %b)
|
|
ret <16 x i8> %r
|
|
}
|