Nicolai Haehnle 494b4aee1e AMDGPU/SI: Add llvm.amdgcn.s.waitcnt.all intrinsic ...

Summary:
So it appears that to guarantee some of the ordering requirements of a GLSL
memoryBarrier() executed in the shader, we need to emit an s_waitcnt.

(We can't use an s_barrier, because memoryBarrier() may appear anywhere in
the shader, in particular it may appear in non-uniform control flow.)

Reviewers: arsenm, mareko, tstellarAMD

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D19203

llvm-svn: 267729

2016-04-27 15:46:01 +00:00

..

llvm

AMDGPU/SI: Add llvm.amdgcn.s.waitcnt.all intrinsic

2016-04-27 15:46:01 +00:00

llvm-c

[ORC] clang-format code that was touched in r267457. NFC.

2016-04-25 21:21:20 +00:00