1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00
llvm-mirror/test/CodeGen
Elena Demikhovsky 832f074a32 Shuffle optimization for AVX/AVX2.
The current patch optimizes frequently used shuffle patterns and gives these instruction sequence reduction.
Before:
      vshufps $-35, %xmm1, %xmm0, %xmm2 ## xmm2 = xmm0[1,3],xmm1[1,3]
       vpermilps       $-40, %xmm2, %xmm2 ## xmm2 = xmm2[0,2,1,3]
       vextractf128    $1, %ymm1, %xmm1
       vextractf128    $1, %ymm0, %xmm0
       vshufps $-35, %xmm1, %xmm0, %xmm0 ## xmm0 = xmm0[1,3],xmm1[1,3]
       vpermilps       $-40, %xmm0, %xmm0 ## xmm0 = xmm0[0,2,1,3]
       vinsertf128     $1, %xmm0, %ymm2, %ymm0
After:
      vshufps $13, %ymm0, %ymm1, %ymm1 ## ymm1 = ymm1[1,3],ymm0[0,0],ymm1[5,7],ymm0[4,4]
      vshufps $13, %ymm0, %ymm0, %ymm0 ## ymm0 = ymm0[1,3,0,0,5,7,4,4]
      vunpcklps       %ymm1, %ymm0, %ymm0 ## ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]

llvm-svn: 159188
2012-06-26 08:04:10 +00:00
..
ARM ARM: update peephole optimization. 2012-06-25 21:49:38 +00:00
CellSPU
CPP
Generic Enforce stricter liveness rules for PHIs. 2012-06-25 18:18:27 +00:00
Hexagon
MBlaze
Mips Extend the IL for selecting TLS models (PR9788) 2012-06-23 11:37:03 +00:00
MSP430
NVPTX
PowerPC Add support for the PPC isel instruction. 2012-06-22 23:10:08 +00:00
SPARC
Thumb
Thumb2
X86 Shuffle optimization for AVX/AVX2. 2012-06-26 08:04:10 +00:00
XCore Fix pattern for MKMSK instruction. 2012-06-13 17:59:12 +00:00