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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
llvm-mirror/test/MC
2020-11-16 16:11:23 +03:00
..
AArch64 [AArch64] Enable RAS 1.1 system registers in all AArch64 2020-11-10 12:13:33 +00:00
AMDGPU [AMDGPU][MC] Corrected error position for some operands and modifiers 2020-11-16 16:11:23 +03:00
ARM [Arm][MC] Remove unused prefixes in .arch_extension fp tests 2020-11-06 15:13:07 +00:00
AsmParser Introduce and use a new section type for the bb_addr_map section. 2020-10-08 11:13:19 -07:00
AVR
BPF
COFF [test][MC] Use %python in llvm/test/MC/COFF/bigobj.py 2020-10-07 14:03:28 -04:00
Disassembler [mips] Add tests to check disassembling of add.ps/mul.ps/sub.ps instructions 2020-11-13 14:31:12 +03:00
ELF [MC] Make MCStreamer aware of AsmParser's StartTokLoc 2020-11-02 12:32:07 -08:00
Hexagon [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
Lanai
MachO llvm-dwarfdump: Dump address forms in their encoded length rather than always in 64 bits 2020-10-04 15:48:57 -07:00
Mips [MC][mips] Remove unused check prefixes. NFC 2020-11-13 14:31:13 +03:00
MSP430 [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
PowerPC [PowerPC] Parse and ignore .machine ppc64 2020-11-02 16:49:57 -08:00
RISCV [RISCV] Fix unused check prefixes in test/MC/RISCV/ 2020-10-29 21:18:30 -07:00
Sparc [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SystemZ [SystemZAsmParser] Treat VR128 separately in ParseDirectiveInsn(). 2020-10-06 14:42:40 +02:00
VE [VE] Add missing BCR format 2020-10-29 23:30:49 +09:00
WebAssembly [WebAssembly] Rename atomic.notify and *.atomic.wait 2020-11-13 12:04:48 -08:00
X86 [AsmParser] Add source location to all errors related to .cfi directives 2020-11-11 17:00:07 +00:00