mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 03:33:20 +01:00
582bb030db
We can't enable the verifier for tests with SI_IF and SI_ELSE, because these instructions are always followed by a COPY which copies their result to the next basic block. This violates the machine verifier's rule that non-terminators can not folow terminators. Reviewed-by: Vincent Lejeune<vljn at ovi.com> llvm-svn: 192366
51 lines
2.1 KiB
LLVM
51 lines
2.1 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
|
|
; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
|
|
|
|
; These tests check that fdiv is expanded correctly and also test that the
|
|
; scheduler is scheduling the RECIP_IEEE and MUL_IEEE instructions in separate
|
|
; instruction groups.
|
|
|
|
; R600-CHECK: @fdiv_v2f32
|
|
; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Z
|
|
; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW]}}, KC0[3].Y
|
|
; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[3].X, PS
|
|
; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].W, PS
|
|
; SI-CHECK: @fdiv_v2f32
|
|
; SI-CHECK-DAG: V_RCP_F32
|
|
; SI-CHECK-DAG: V_MUL_F32
|
|
; SI-CHECK-DAG: V_RCP_F32
|
|
; SI-CHECK-DAG: V_MUL_F32
|
|
define void @fdiv_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) {
|
|
entry:
|
|
%0 = fdiv <2 x float> %a, %b
|
|
store <2 x float> %0, <2 x float> addrspace(1)* %out
|
|
ret void
|
|
}
|
|
|
|
; R600-CHECK: @fdiv_v4f32
|
|
; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
; R600-CHECK-DAG: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
|
|
; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, PS
|
|
; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, PS
|
|
; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, PS
|
|
; R600-CHECK-DAG: MUL_IEEE {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, PS
|
|
; SI-CHECK: @fdiv_v4f32
|
|
; SI-CHECK-DAG: V_RCP_F32
|
|
; SI-CHECK-DAG: V_MUL_F32
|
|
; SI-CHECK-DAG: V_RCP_F32
|
|
; SI-CHECK-DAG: V_MUL_F32
|
|
; SI-CHECK-DAG: V_RCP_F32
|
|
; SI-CHECK-DAG: V_MUL_F32
|
|
; SI-CHECK-DAG: V_RCP_F32
|
|
; SI-CHECK-DAG: V_MUL_F32
|
|
define void @fdiv_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
|
|
%b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1
|
|
%a = load <4 x float> addrspace(1) * %in
|
|
%b = load <4 x float> addrspace(1) * %b_ptr
|
|
%result = fdiv <4 x float> %a, %b
|
|
store <4 x float> %result, <4 x float> addrspace(1)* %out
|
|
ret void
|
|
}
|