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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
104 lines
3.9 KiB
C++
104 lines
3.9 KiB
C++
//===--- MipsABIFlags.h - MIPS ABI flags ----------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the constants for the ABI flags structure contained
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// in the .MIPS.abiflags section.
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//
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// https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_SUPPORT_MIPSABIFLAGS_H
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#define LLVM_SUPPORT_MIPSABIFLAGS_H
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namespace llvm {
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namespace Mips {
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// Values for the xxx_size bytes of an ABI flags structure.
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enum AFL_REG {
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AFL_REG_NONE = 0x00, // No registers
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AFL_REG_32 = 0x01, // 32-bit registers
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AFL_REG_64 = 0x02, // 64-bit registers
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AFL_REG_128 = 0x03 // 128-bit registers
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};
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// Masks for the ases word of an ABI flags structure.
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enum AFL_ASE {
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AFL_ASE_DSP = 0x00000001, // DSP ASE
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AFL_ASE_DSPR2 = 0x00000002, // DSP R2 ASE
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AFL_ASE_EVA = 0x00000004, // Enhanced VA Scheme
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AFL_ASE_MCU = 0x00000008, // MCU (MicroController) ASE
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AFL_ASE_MDMX = 0x00000010, // MDMX ASE
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AFL_ASE_MIPS3D = 0x00000020, // MIPS-3D ASE
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AFL_ASE_MT = 0x00000040, // MT ASE
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AFL_ASE_SMARTMIPS = 0x00000080, // SmartMIPS ASE
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AFL_ASE_VIRT = 0x00000100, // VZ ASE
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AFL_ASE_MSA = 0x00000200, // MSA ASE
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AFL_ASE_MIPS16 = 0x00000400, // MIPS16 ASE
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AFL_ASE_MICROMIPS = 0x00000800, // MICROMIPS ASE
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AFL_ASE_XPA = 0x00001000, // XPA ASE
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AFL_ASE_CRC = 0x00008000, // CRC ASE
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AFL_ASE_GINV = 0x00020000 // GINV ASE
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};
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// Values for the isa_ext word of an ABI flags structure.
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enum AFL_EXT {
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AFL_EXT_NONE = 0, // None
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AFL_EXT_XLR = 1, // RMI Xlr instruction
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AFL_EXT_OCTEON2 = 2, // Cavium Networks Octeon2
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AFL_EXT_OCTEONP = 3, // Cavium Networks OcteonP
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AFL_EXT_LOONGSON_3A = 4, // Loongson 3A
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AFL_EXT_OCTEON = 5, // Cavium Networks Octeon
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AFL_EXT_5900 = 6, // MIPS R5900 instruction
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AFL_EXT_4650 = 7, // MIPS R4650 instruction
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AFL_EXT_4010 = 8, // LSI R4010 instruction
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AFL_EXT_4100 = 9, // NEC VR4100 instruction
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AFL_EXT_3900 = 10, // Toshiba R3900 instruction
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AFL_EXT_10000 = 11, // MIPS R10000 instruction
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AFL_EXT_SB1 = 12, // Broadcom SB-1 instruction
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AFL_EXT_4111 = 13, // NEC VR4111/VR4181 instruction
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AFL_EXT_4120 = 14, // NEC VR4120 instruction
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AFL_EXT_5400 = 15, // NEC VR5400 instruction
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AFL_EXT_5500 = 16, // NEC VR5500 instruction
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AFL_EXT_LOONGSON_2E = 17, // ST Microelectronics Loongson 2E
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AFL_EXT_LOONGSON_2F = 18, // ST Microelectronics Loongson 2F
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AFL_EXT_OCTEON3 = 19 // Cavium Networks Octeon3
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};
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// Values for the flags1 word of an ABI flags structure.
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enum AFL_FLAGS1 { AFL_FLAGS1_ODDSPREG = 1 };
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// MIPS object attribute tags
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enum {
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Tag_GNU_MIPS_ABI_FP = 4, // Floating-point ABI used by this object file
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Tag_GNU_MIPS_ABI_MSA = 8, // MSA ABI used by this object file
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};
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// Values for the fp_abi word of an ABI flags structure
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// and for the Tag_GNU_MIPS_ABI_FP attribute tag.
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enum Val_GNU_MIPS_ABI_FP {
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Val_GNU_MIPS_ABI_FP_ANY = 0, // not tagged
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Val_GNU_MIPS_ABI_FP_DOUBLE = 1, // hard float / -mdouble-float
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Val_GNU_MIPS_ABI_FP_SINGLE = 2, // hard float / -msingle-float
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Val_GNU_MIPS_ABI_FP_SOFT = 3, // soft float
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Val_GNU_MIPS_ABI_FP_OLD_64 = 4, // -mips32r2 -mfp64
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Val_GNU_MIPS_ABI_FP_XX = 5, // -mfpxx
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Val_GNU_MIPS_ABI_FP_64 = 6, // -mips32r2 -mfp64
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Val_GNU_MIPS_ABI_FP_64A = 7 // -mips32r2 -mfp64 -mno-odd-spreg
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};
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// Values for the Tag_GNU_MIPS_ABI_MSA attribute tag.
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enum Val_GNU_MIPS_ABI_MSA {
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Val_GNU_MIPS_ABI_MSA_ANY = 0, // not tagged
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Val_GNU_MIPS_ABI_MSA_128 = 1 // 128-bit MSA
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};
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}
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}
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#endif
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