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llvm-mirror/test/CodeGen
Aditya Nandakumar 83ff413d56 [GISel]: Add G_FEXP, G_FEXP2 opcodes
Also add IRTranslator support.
https://reviews.llvm.org/D34710

llvm-svn: 306475
2017-06-27 22:19:32 +00:00
..
AArch64 [GISel]: Add G_FEXP, G_FEXP2 opcodes 2017-06-27 22:19:32 +00:00
AMDGPU [AMDGPU] Add 2 new alignbit patterns 2017-06-27 19:10:47 +00:00
ARM [ARM] GlobalISel: Support G_SELECT for pointers 2017-06-27 10:29:50 +00:00
AVR
BPF
Generic [SystemZ] Fix trap issue and enable expensive checks. 2017-06-23 14:30:46 +00:00
Hexagon Create a PHI value when merging with a known undef live-in 2017-06-27 21:30:46 +00:00
Inputs
Lanai
Mips [mips][msa] Splat.d endianness check 2017-06-23 09:09:31 +00:00
MIR
MSP430 [MSP430] Fix data layout string. 2017-06-23 21:11:45 +00:00
Nios2
NVPTX
PowerPC [CGP] eliminate a sub instruction in memcmp expansion 2017-06-27 21:46:34 +00:00
SPARC
SystemZ [SystemZ] Fix missing emergency spill slot corner case 2017-06-26 16:50:32 +00:00
Thumb
Thumb2
WebAssembly [WebAssembly] WebAssemblyFastISel getelementptr variable index support 2017-06-22 21:26:08 +00:00
WinEH
X86 [CGP] eliminate a sub instruction in memcmp expansion 2017-06-27 21:46:34 +00:00
XCore