mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 19:23:23 +01:00
311b69b658
Summary: When generating MIPS assembly, LLVM always overrides the default assembler options by emitting the '.set noreorder', '.set nomacro' and '.set noat' directives, while GCC uses the default options if an assembly-level function contains inline assembly code. This becomes a problem when the code generated by LLVM is interleaved with inline assembly which assumes GCC-like assembler options (from Linux, for example). This patch fixes these conflicts by setting the appropriate assembler options at the beginning of an inline asm block and popping them at the end. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6637 llvm-svn: 224425
24 lines
692 B
LLVM
24 lines
692 B
LLVM
; RUN: llc -march=mips < %s | FileCheck %s
|
|
|
|
; Check for the emission of appropriate assembler directives before and
|
|
; after the inline assembly code.
|
|
define void @f() nounwind {
|
|
entry:
|
|
; CHECK: #APP
|
|
; CHECK-NEXT: .set push
|
|
; CHECK-NEXT: .set at
|
|
; CHECK-NEXT: .set macro
|
|
; CHECK-NEXT: .set reorder
|
|
; CHECK: addi $9, ${{[2-9][0-9]?}}, 8
|
|
; CHECK: subi ${{[2-9][0-9]?}}, $9, 6
|
|
; CHECK: .set pop
|
|
; CHECK-NEXT: #NO_APP
|
|
%a = alloca i32, align 4
|
|
%b = alloca i32, align 4
|
|
store i32 20, i32* %a, align 4
|
|
%0 = load i32* %a, align 4
|
|
%1 = call i32 asm sideeffect "addi $$9, $1, 8\0A\09subi $0, $$9, 6", "=r,r,~{$1}"(i32 %0)
|
|
store i32 %1, i32* %b, align 4
|
|
ret void
|
|
}
|