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llvm-mirror/test/CodeGen/Mips/mips64imm.ll
Daniel Sanders a4a46c15fe [mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point
Summary:
Two exceptions to this:
  test/CodeGen/Mips/octeon.ll
  test/CodeGen/Mips/octeon_popcnt.ll
these test extensions to MIPS64

One test is altered for MIPS-IV:
  test/CodeGen/Mips/mips64countleading.ll
    Tests dclo/dclz which were added in MIPS64. The MIPS-IV version tests
    that dclo/dclz are not emitted.

Four tests fail and are not in this patch:
  test/CodeGen/Mips/abicalls.ll
  test/CodeGen/Mips/fcopysign-f32-f64.ll
  test/CodeGen/Mips/fcopysign.ll
  test/CodeGen/Mips/stack-alignment.ll

Depends on D3343

Reviewers: matheusalmeida, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3344

llvm-svn: 206185
2014-04-14 16:00:28 +00:00

54 lines
1.2 KiB
LLVM

; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s
; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
define i32 @foo1() nounwind readnone {
entry:
; CHECK: foo1
; CHECK: lui ${{[0-9]+}}, 4660
; CHECK-NOT: ori
ret i32 305397760
}
define i64 @foo3() nounwind readnone {
entry:
; CHECK: foo3
; CHECK: lui $[[R0:[0-9]+]], 4660
; CHECK: daddiu ${{[0-9]+}}, $[[R0]], 22136
ret i64 305419896
}
define i64 @foo6() nounwind readnone {
entry:
; CHECK: foo6
; CHECK: ori ${{[0-9]+}}, $zero, 33332
ret i64 33332
}
define i64 @foo7() nounwind readnone {
entry:
; CHECK: foo7
; CHECK: daddiu ${{[0-9]+}}, $zero, -32204
ret i64 -32204
}
define i64 @foo9() nounwind readnone {
entry:
; CHECK: foo9
; CHECK: lui $[[R0:[0-9]+]], 583
; CHECK: daddiu $[[R1:[0-9]+]], $[[R0]], -30001
; CHECK: dsll $[[R2:[0-9]+]], $[[R1]], 18
; CHECK: daddiu $[[R3:[0-9]+]], $[[R2]], 18441
; CHECK: dsll $[[R4:[0-9]+]], $[[R3]], 17
; CHECK: daddiu ${{[0-9]+}}, $[[R4]], 13398
ret i64 1311768467284833366
}
define i64 @foo10() nounwind readnone {
entry:
; CHECK: foo10
; CHECK: lui $[[R0:[0-9]+]], 34661
; CHECK: daddiu ${{[0-9]+}}, $[[R0]], 17185
ret i64 -8690466096928522240
}