Kevin Enderby 84e97c7df2 For ARM disassembly only print 32 unsigned bits for the address of branch ... targets so if the branch target has the high bit set it does not get printed as: beq 0xffffffff8008c404 llvm-svn: 154685		2012-04-13 18:46:37 +00:00
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Analysis	Add two statistics to help track how we are computing the inline cost.	2012-04-11 10:15:10 +00:00
Archive	Include cstdio in a few place that depended on getting it transitively through StringExtras.h	2012-03-23 11:35:30 +00:00
AsmParser
Bitcode	llvm::SwitchInst	2012-03-11 06:09:17 +00:00
CodeGen	HexagonPacketizer patch.	2012-04-12 21:06:38 +00:00
DebugInfo	Fix a C++11 UDL conflict.	2012-04-04 20:33:56 +00:00
ExecutionEngine	This patch improves the MCJIT runtime dynamic loader by adding new handling	2012-04-12 20:13:57 +00:00
Linker	It's possible for two types, which are isomorphic, to be added to the	2012-03-23 23:17:38 +00:00
MC	Compute hashes directly with hash_combine instead of taking a detour through FoldingSetNodeID.	2012-04-11 14:06:39 +00:00
Object	Remove unused variable.	2012-04-13 08:09:12 +00:00
Support	Fix the build under Debian GNU/Hurd.	2012-04-11 15:35:36 +00:00
TableGen	Fix infinite loop in nested multiclasses.	2012-03-07 16:39:35 +00:00
Target	For ARM disassembly only print 32 unsigned bits for the address of branch	2012-04-13 18:46:37 +00:00
Transforms	Consider ObjC runtime calls objc_storeWeak and others which make a copy of	2012-04-13 18:28:58 +00:00
VMCore	Def here is an Instruction, so !isa<Instruction>(Def) is always false,	2012-04-13 00:50:57 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile