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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
llvm-mirror/include/llvm
Jatin Bhateja 84f0cdcd15 [X86] Improvement in CodeGen instruction selection for LEAs (re-applying post required revision changes.)
Summary:
   1/  Operand folding during complex pattern matching for LEAs has been
       extended, such that it promotes Scale to accommodate similar operand
       appearing in the DAG.
       e.g.
         T1 = A + B
         T2 = T1 + 10
         T3 = T2 + A
       For above DAG rooted at T3, X86AddressMode will no look like
         Base = B , Index = A , Scale = 2 , Disp = 10

   2/  During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
       so that if there is an opportunity then complex LEAs (having 3 operands)
       could be factored out.
       e.g.
         leal 1(%rax,%rcx,1), %rdx
         leal 1(%rax,%rcx,2), %rcx
       will be factored as following
         leal 1(%rax,%rcx,1), %rdx
         leal (%rdx,%rcx)   , %edx

   3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
      thus avoiding creation of any complex LEAs within a loop.

Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy

Reviewed By: lsaba

Subscribers: jmolloy, spatel, igorb, llvm-commits

    Differential Revision: https://reviews.llvm.org/D35014

llvm-svn: 314886
2017-10-04 09:02:10 +00:00
..
ADT [MC] - Don't assert when non-english characters are used. 2017-10-04 08:50:08 +00:00
Analysis Revert r314806 "[SLP] Vectorize jumbled memory loads." 2017-10-03 18:32:29 +00:00
AsmParser Move the stripping of invalid debug info from the Verifier to AutoUpgrade. 2017-10-02 18:31:29 +00:00
BinaryFormat AMDGPU: Add ELFOSABI_AMDGPU_MESA3D 2017-10-03 21:14:14 +00:00
Bitcode
CodeGen [X86] Improvement in CodeGen instruction selection for LEAs (re-applying post required revision changes.) 2017-10-04 09:02:10 +00:00
Config Use sched_getaffinity instead of std:🧵:hardware_concurrency. 2017-10-03 16:25:15 +00:00
DebugInfo Revert r314817 "[dwarfdump] Add -lookup option" 2017-10-03 18:39:13 +00:00
Demangle
ExecutionEngine [ORC] Fix the type of RTDyldObjectLinkingLayer::NotifyLoadedFtor. 2017-09-28 17:43:07 +00:00
FuzzMutate
IR Refactor DIBuilder dbg intrinsic insertion, NFC 2017-10-03 20:36:40 +00:00
IRReader Move the stripping of invalid debug info from the Verifier to AutoUpgrade. 2017-10-02 18:31:29 +00:00
LineEditor
Linker
LTO [Support] Rename tool_output_file to ToolOutputFile, NFC 2017-09-23 01:03:17 +00:00
MC [Assembler] Report multiple near misses for invalid instructions 2017-10-03 09:33:12 +00:00
Object AMDGPU: Add ELFOSABI_AMDGPU_PAL 2017-10-03 20:54:07 +00:00
ObjectYAML [WebAssembly] Allow each data segment to specify its own alignment 2017-09-29 16:50:08 +00:00
Option
Passes
ProfileData Separate the logic when handling indirect calls in SamplePGO ThinLTO compile phase and other phases. 2017-10-01 05:24:51 +00:00
Support [Dominators] Make eraseNode invalidate DFS numbers 2017-10-03 21:17:48 +00:00
TableGen
Target [AsmParser] Add DiagnosticString to AsmOperands in tablegen 2017-10-03 14:34:57 +00:00
Testing/Support
ToolDrivers
Transforms Separate the logic when handling indirect calls in SamplePGO ThinLTO compile phase and other phases. 2017-10-01 05:24:51 +00:00
WindowsManifest
WindowsResource [llvm-readobj] Teach readobj to dump .res files (WindowsResource). 2017-09-20 18:33:35 +00:00
XRay [XRay] convert FDR arg1 log entries 2017-09-27 04:48:03 +00:00
CMakeLists.txt
InitializePasses.h Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"" 2017-10-03 16:59:13 +00:00
LinkAllIR.h
LinkAllPasses.h
module.modulemap CodeView: Provide a .def file with the register ids 2017-10-03 18:27:22 +00:00
module.modulemap.build
Pass.h
PassAnalysisSupport.h
PassInfo.h
PassRegistry.h
PassSupport.h