mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 04:02:41 +01:00
b4f08df47a
This patch resubmits the SVE ZIP1/ZIP2 patch series consisting of of r320992, r320986, r320973, and r320970 by reverting https://reviews.llvm.org/rL321024. The issue that caused r321024 has been addressed in https://reviews.llvm.org/rL321158, so this patch-series should be safe to resubmit. llvm-svn: 321163
14 lines
918 B
ArmAsm
14 lines
918 B
ArmAsm
# Instructions that are correctly rejected but emit a wrong or misleading error.
|
|
# RUN: not llvm-mc %s -triple=mips -show-encoding -mattr=micromips 2>%t1
|
|
# RUN: FileCheck %s < %t1
|
|
|
|
# The 20-bit immediate supported by the standard encodings cause us to emit
|
|
# the diagnostic for the 20-bit form. This isn't exactly wrong but it is
|
|
# misleading. Ideally, we'd emit every way to achieve a valid match instead
|
|
# of picking only one.
|
|
sdbbp -1 # CHECK: :[[@LINE]]:9: error: expected 10-bit unsigned immediate
|
|
sdbbp 1024 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
|
|
syscall -1 # CHECK: :[[@LINE]]:11: error: expected 10-bit unsigned immediate
|
|
syscall $4 # CHECK: :[[@LINE]]:11: error: expected 10-bit unsigned immediate
|
|
syscall 1024 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled
|