RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 20:51:52 +01:00
Code Issues Projects Releases Wiki Activity
llvm-mirror/test/MC
History
Craig Topper 990821de64 [RISCV] Prevent assertion in the assembler if vmerge or vfmerge are given a V0 destination.
2020-12-14 17:22:55 -08:00
..
AArch64
[Triple][MachO] Define "arm64e", an AArch64 subarch for Pointer Auth.
2020-12-03 07:53:59 -08:00
AMDGPU
[llvm-readobj] - For SHT_REL relocations, don't display an addend.
2020-12-14 12:03:00 +03:00
ARM
[llvm-readobj] - For SHT_REL relocations, don't display an addend.
2020-12-14 12:03:00 +03:00
AsmParser
[MC] Fix ICE with non-newline terminated input
2020-12-09 23:39:32 +00:00
AVR
[AVRInstPrinter] printOperand: support llvm-objdump --print-imm-hex
2020-07-12 08:14:52 -07:00
BPF
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
COFF
[CodeView] Fix inline sites that are missing code offsets.
2020-12-07 13:01:53 -08:00
Disassembler
[RISCV] Add support for printing pcrel immediates as absolute addresses in llvm-objdump
2020-12-04 10:34:12 -08:00
ELF
[llvm-readobj] - For SHT_REL relocations, don't display an addend.
2020-12-14 12:03:00 +03:00
Hexagon
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
Lanai
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
MachO
[Triple][MachO] Define "arm64e", an AArch64 subarch for Pointer Auth.
2020-12-03 07:53:59 -08:00
Mips
[llvm-readobj] - For SHT_REL relocations, don't display an addend.
2020-12-14 12:03:00 +03:00
MSP430
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
PowerPC
[PowerPC] Correct the bit-width definition for some imm operand in td.
2020-12-08 03:20:12 +00:00
RISCV
[RISCV] Prevent assertion in the assembler if vmerge or vfmerge are given a V0 destination.
2020-12-14 17:22:55 -08:00
Sparc
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
SystemZ
[SystemZ] Adding extra extended mnemonics for SystemZ target
2020-12-02 08:25:31 -05:00
VE
[VE] Add missing BCR format
2020-10-29 23:30:49 +09:00
WebAssembly
[WebAssembly] Support COMDAT sections in assembly syntax
2020-12-10 16:43:59 -08:00
X86
[llvm-readobj] - For SHT_REL relocations, don't display an addend.
2020-12-14 12:03:00 +03:00