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llvm-mirror/test/MC/Disassembler
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Simon Dardis 7bd8310ae6 [mips] Fix aui/daui/dahi/dati for MIPSR6 
For compatiblity with binutils, define these instructions to take
two registers with a 16bit unsigned immediate. Both of the registers
have to be same for dahi and dati.

Reviewers: dsanders, zoran.jovanovic

Differential Review: https://reviews.llvm.org/D21473

llvm-svn: 284218
2016-10-14 09:31:42 +00:00
..
AArch64 AArch64: TableGenerate system instruction operands. 2016-07-05 21:23:04 +00:00
AMDGPU [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3. 2016-10-07 15:53:16 +00:00
ARM [ARM] Saturation instructions are DSP-only 2016-07-25 22:25:25 +00:00
Hexagon [Hexagon] Treat all conditional branches as predicted (not-taken by default) 2016-05-09 18:22:07 +00:00
Lanai
Mips [mips] Fix aui/daui/dahi/dati for MIPSR6 2016-10-14 09:31:42 +00:00
PowerPC [PowerPC] Add asm parser/disassembler support for hrfid,nap,slbmfev 2016-09-02 23:42:01 +00:00
Sparc
SystemZ [SystemZ] Add missing classes and instructions 2016-08-05 15:14:34 +00:00
X86 Add new flag and intrinsic support for MWAITX and MONITORX instructions 2016-05-18 11:59:12 +00:00
XCore