Ashutosh Nema 0cfbe42fbc Add new flag and intrinsic support for MWAITX and MONITORX instructions ... Summary: MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT pair while adding a timer function, such that another termination of the MWAITX instruction occurs when the timer expires. The presence of the MONITORX and MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29. The MONITORX and MWAITX instructions are intercepted by the same bits that intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be monitored. MWAITX instruction causes the processor to stop instruction execution and enter an implementation-dependent optimized state until occurrence of a class of events. Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is "0F 01 FB". These opcode information is used in adding tests for the disassembler. These instructions are enabled for AMD's bdver4 architecture. Patch by Ganesh Gopalasubramanian! Reviewers: echristo, craig.topper, RKSimon Subscribers: RKSimon, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D19795 llvm-svn: 269911		2016-05-18 11:59:12 +00:00
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avx-512.txt	[AVX-512] Fix test case update missed in r257299.	2016-01-11 00:56:48 +00:00
fp-stack.txt
hex-immediates.txt
intel-syntax-32.txt
intel-syntax.txt	AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.	2016-02-25 13:30:17 +00:00
invalid-VEX-vvvv.txt
lit.local.cfg
marked-up.txt
missing-sib.txt
moffs.txt
padlock.txt
prefixes.txt
simple-tests.txt	Add new flag and intrinsic support for MWAITX and MONITORX instructions	2016-05-18 11:59:12 +00:00
truncated-input.txt
x86-16.txt
x86-32.txt	Add new flag and intrinsic support for MWAITX and MONITORX instructions	2016-05-18 11:59:12 +00:00
x86-64.txt