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5fe828ca5e
This patch issues an error message if Darwin ABI is attempted with the PPC backend. It also cleans up existing test cases, either converting the test to use an alternative triple or removing the test if the coverage is no longer needed. Updated Tests ------------- The majority of test cases were updated to use a different triple that does not include the Darwin ABI. Many tests were also updated to use FileCheck, in place of grep. Deleted Tests ------------- llvm/test/tools/dsymutil/PowerPC/sibling.test was originally added to test specific functionality of dsymutil using an object file created with an old version of llvm-gcc for a Powerbook G4. After a discussion with @JDevlieghere he suggested removing the test. llvm/test/CodeGen/PowerPC/combine_loads_from_build_pair.ll was converted from a PPC test to a SystemZ test, as the behavior is also reproducible there. All other tests that were deleted were specific to the darwin/ppc ABI and no longer necessary. Phabricator Review: https://reviews.llvm.org/D50988 llvm-svn: 340795
68 lines
2.6 KiB
LLVM
68 lines
2.6 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -enable-tail-merge=0 | grep bl.*baz | count 2
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -enable-tail-merge=0 | grep bl.*quux | count 2
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep bl.*baz | count 1
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep bl.*quux | count 1
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; Check that tail merging is the default on ppc, and that -enable-tail-merge works.
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; ModuleID = 'tail.c'
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
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;; target triple = "i686-apple-darwin8"
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define i32 @f(i32 %i, i32 %q) {
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entry:
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%i_addr = alloca i32 ; <i32*> [#uses=2]
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%q_addr = alloca i32 ; <i32*> [#uses=2]
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%retval = alloca i32, align 4 ; <i32*> [#uses=1]
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store i32 %i, i32* %i_addr
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store i32 %q, i32* %q_addr
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%tmp = load i32, i32* %i_addr ; <i32> [#uses=1]
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%tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1]
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%tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1]
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%toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1]
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br i1 %toBool, label %cond_true, label %cond_false
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cond_true: ; preds = %entry
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%tmp3 = call i32 (...) @bar( ) ; <i32> [#uses=0]
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%tmp4 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
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%tmp7 = load i32, i32* %q_addr ; <i32> [#uses=1]
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%tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1]
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%tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1]
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%toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1]
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br i1 %toBool10, label %cond_true11, label %cond_false15
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cond_false: ; preds = %entry
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%tmp5 = call i32 (...) @foo( ) ; <i32> [#uses=0]
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%tmp6 = call i32 (...) @baz( i32 5, i32 6 ) ; <i32> [#uses=0]
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%tmp27 = load i32, i32* %q_addr ; <i32> [#uses=1]
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%tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1]
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%tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1]
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%toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1]
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br i1 %toBool210, label %cond_true11, label %cond_false15
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cond_true11: ; preds = %cond_next
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%tmp13 = call i32 (...) @foo( ) ; <i32> [#uses=0]
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%tmp14 = call i32 (...) @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
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br label %cond_next18
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cond_false15: ; preds = %cond_next
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%tmp16 = call i32 (...) @bar( ) ; <i32> [#uses=0]
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%tmp17 = call i32 (...) @quux( i32 3, i32 4 ) ; <i32> [#uses=0]
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br label %cond_next18
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cond_next18: ; preds = %cond_false15, %cond_true11
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%tmp19 = call i32 (...) @bar( ) ; <i32> [#uses=0]
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br label %return
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return: ; preds = %cond_next18
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%retval20 = load i32, i32* %retval ; <i32> [#uses=1]
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ret i32 %retval20
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}
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declare i32 @bar(...)
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declare i32 @baz(...)
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declare i32 @foo(...)
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declare i32 @quux(...)
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