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llvm-mirror/test/CodeGen/PowerPC/Frames-large.ll
Francis Visoiu Mistrih f7ea499702 Replace "no-frame-pointer-*" function attributes with "frame-pointer"
Part of the effort to refactoring frame pointer code generation. We used
to use two function attributes "no-frame-pointer-elim" and
"no-frame-pointer-elim-non-leaf" to represent three kinds of frame
pointer usage: (all) frames use frame pointer, (non-leaf) frames use
frame pointer, (none) frame use frame pointer. This CL makes the idea
explicit by using only one enum function attribute "frame-pointer"

Option "-frame-pointer=" replaces "-disable-fp-elim" for tools such as
llc.

"no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" are still
supported for easy migration to "frame-pointer".

tests are mostly updated with

// replace command line args ‘-disable-fp-elim=false’ with ‘-frame-pointer=none’
grep -iIrnl '\-disable-fp-elim=false' * | xargs sed -i '' -e "s/-disable-fp-elim=false/-frame-pointer=none/g"

// replace command line args ‘-disable-fp-elim’ with ‘-frame-pointer=all’
grep -iIrnl '\-disable-fp-elim' * | xargs sed -i '' -e "s/-disable-fp-elim/-frame-pointer=all/g"

Patch by Yuanfang Chen (tabloid.adroit)!

Differential Revision: https://reviews.llvm.org/D56351

llvm-svn: 351049
2019-01-14 10:55:55 +00:00

54 lines
1.5 KiB
LLVM

; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu | FileCheck %s -check-prefix=PPC32-NOFP
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu -frame-pointer=all | FileCheck %s -check-prefix=PPC32-FP
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=PPC64-NOFP
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -frame-pointer=all | FileCheck %s -check-prefix=PPC64-FP
define i32* @f1() nounwind {
%tmp = alloca i32, i32 8191 ; <i32*> [#uses=1]
ret i32* %tmp
}
; PPC32-NOFP: f1:
; PPC32-NOFP: lis 0, -1
; PPC32-NOFP: ori 0, 0, 32752
; PPC32-NOFP: stwux 1, 1, 0
; PPC32-NOFP-DAG: addi 3, 1, 20
; PPC32-NOFP-DAG: lwz 31, 0(1)
; PPC32-NOFP: mr 1, 31
; PPC32-NOFP: mr 31, 0
; PPC32-NOFP: blr
; PPC32-FP: lis 0, -1
; PPC32-FP: ori 0, 0, 32752
; PPC32-FP: stwux 1, 1, 0
; PPC32-FP: subf 0, 0, 1
; PPC32-FP: addic 0, 0, -4
; PPC32-FP: stwx 31, 0, 0
; PPC32-FP: mr 31, 1
; PPC32-FP: addi 3, 31, 16
; PPC32-FP: lwz 31, 0(1)
; PPC32-FP: lwz 0, -4(31)
; PPC32-FP: mr 1, 31
; PPC32-FP: mr 31, 0
; PPC32-FP: blr
; PPC64-NOFP: f1:
; PPC64-NOFP: lis 0, -1
; PPC64-NOFP: ori 0, 0, 32720
; PPC64-NOFP: stdux 1, 1, 0
; PPC64-NOFP: addi 3, 1, 52
; PPC64-NOFP: ld 1, 0(1)
; PPC64-NOFP: blr
; PPC64-FP: f1:
; PPC64-FP: lis 0, -1
; PPC64-FP: ori 0, 0, 32704
; PPC64-FP: std 31, -8(1)
; PPC64-FP: stdux 1, 1, 0
; PPC64-FP: mr 31, 1
; PPC64-FP: addi 3, 31, 60
; PPC64-FP: ld 1, 0(1)
; PPC64-FP: ld 31, -8(1)
; PPC64-FP: blr