mirror of
https://github.com/RPCS3/llvm-mirror.git
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b1580fbd5c
Differential Revision: https://reviews.llvm.org/D63477 llvm-svn: 364993
168 lines
5.8 KiB
LLVM
168 lines
5.8 KiB
LLVM
; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs -mcpu=pwr8 | FileCheck %s --check-prefixes=CHECK,CHECK-PWR8
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; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs -mcpu=a2q | FileCheck %s --check-prefixes=CHECK,CHECK-A2Q
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; Verify that we do NOT generate the mtctr instruction for loop trip counts < 4
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; The latency of the mtctr is only justified if there are more than 4 comparisons that are removed as a result.
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@a = common local_unnamed_addr global i32 0, align 4
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@b = common local_unnamed_addr global i32 0, align 4
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@c = common local_unnamed_addr global i32 0, align 4
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@d = common local_unnamed_addr global i32 0, align 4
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@e = common local_unnamed_addr global i32 0, align 4
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@f = common local_unnamed_addr global i32 0, align 4
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@arr = common local_unnamed_addr global [5 x i32] zeroinitializer, align 4
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; Function Attrs: norecurse nounwind readonly
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define signext i32 @testTripCount2(i32 signext %a) {
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; CHECK-LABEL: testTripCount2:
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; CHECK-NOT: mtctr
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; CHECK: blr
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entry:
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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ret i32 %add
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ 1, %entry ], [ %indvars.iv.next, %for.body ]
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%Sum.05 = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @arr, i64 0, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, %Sum.05
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%indvars.iv.next = add nsw i64 %indvars.iv, -1
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%tobool = icmp eq i64 %indvars.iv, 0
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br i1 %tobool, label %for.cond.cleanup, label %for.body
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}
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; Function Attrs: norecurse nounwind readonly
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define signext i32 @testTripCount3(i32 signext %a) {
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; CHECK-LABEL: testTripCount3:
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; CHECK-NOT: mtctr
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; CHECK: blr
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entry:
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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ret i32 %add
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ 2, %entry ], [ %indvars.iv.next, %for.body ]
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%Sum.05 = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @arr, i64 0, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, %Sum.05
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%indvars.iv.next = add nsw i64 %indvars.iv, -1
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%tobool = icmp eq i64 %indvars.iv, 0
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br i1 %tobool, label %for.cond.cleanup, label %for.body
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}
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; Function Attrs: norecurse nounwind readonly
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define signext i32 @testTripCount4(i32 signext %a) {
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; CHECK-LABEL: testTripCount4:
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; CHECK: mtctr
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; CHECK: bdnz
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entry:
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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ret i32 %add
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ 3, %entry ], [ %indvars.iv.next, %for.body ]
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%Sum.05 = phi i32 [ 0, %entry ], [ %add, %for.body ]
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%arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @arr, i64 0, i64 %indvars.iv
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, %Sum.05
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%indvars.iv.next = add nsw i64 %indvars.iv, -1
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%tobool = icmp eq i64 %indvars.iv, 0
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br i1 %tobool, label %for.cond.cleanup, label %for.body
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}
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; Function Attrs: norecurse nounwind
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; On core a2q, IssueWidth is 1. On core pwr8, IssueWidth is 8.
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; a2q should use mtctr, but pwr8 should not use mtctr.
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define signext i32 @testTripCount2NonSmallLoop() {
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; CHECK-LABEL: testTripCount2NonSmallLoop:
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; CHECK-A2Q: mtctr
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; CHECK-PWR8-NOT: mtctr
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; CHECK: blr
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entry:
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%.pre = load i32, i32* @a, align 4
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br label %for.body
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for.body: ; preds = %entry, %if.end
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%0 = phi i32 [ %.pre, %entry ], [ %1, %if.end ]
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%dec4 = phi i32 [ 1, %entry ], [ %dec, %if.end ]
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%b.03 = phi i8 [ 0, %entry ], [ %b.1, %if.end ]
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%tobool1 = icmp eq i32 %0, 0
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br i1 %tobool1, label %if.end, label %if.then
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if.then: ; preds = %for.body
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store i32 2, i32* @a, align 4
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br label %if.end
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if.end: ; preds = %for.body, %if.then
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%1 = phi i32 [ 2, %if.then ], [ 0, %for.body ]
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%b.1 = phi i8 [ 2, %if.then ], [ %b.03, %for.body ]
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%dec = add nsw i32 %dec4, -1
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%tobool = icmp eq i32 %dec4, 0
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br i1 %tobool, label %for.end, label %for.body
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for.end: ; preds = %if.end
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%conv = zext i8 %b.1 to i32
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ret i32 %conv
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}
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; On core a2q, IssueWidth is 1. On core pwr8, IssueWidth is 8.
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; a2q should use mtctr, but pwr8 should not use mtctr.
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define signext i32 @testTripCount5() {
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; CHECK-LABEL: testTripCount5:
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; CHECK-PWR8-NOT: mtctr
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; CHECK-A2Q: mtctr
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entry:
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%.prea = load i32, i32* @a, align 4
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%.preb = load i32, i32* @b, align 4
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%.prec = load i32, i32* @c, align 4
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%.pred = load i32, i32* @d, align 4
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%.pree = load i32, i32* @e, align 4
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%.pref = load i32, i32* @f, align 4
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ 2, %entry ], [ %indvars.iv.next, %for.body ]
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%0 = phi i32 [ %.prea, %entry ], [ %6, %for.body ]
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%1 = phi i32 [ %.preb, %entry ], [ %7, %for.body ]
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%2 = phi i32 [ %.prec, %entry ], [ %8, %for.body ]
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%3 = phi i32 [ %.pred, %entry ], [ %9, %for.body ]
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%4 = phi i32 [ %.pree, %entry ], [ %10, %for.body ]
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%5 = phi i32 [ %.pref, %entry ], [ %11, %for.body ]
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%6 = add i32 %0, 1
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%7 = add i32 %1, 1
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%8 = add i32 %2, 1
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%9 = add i32 %3, 1
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%10 = add i32 %4, 1
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%11 = add i32 %5, 1
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%indvars.iv.next = add nsw i64 %indvars.iv, -1
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%tobool = icmp eq i64 %indvars.iv, 0
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br i1 %tobool, label %for.end, label %for.body
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for.end: ; preds = %for.body
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store i32 %6, i32* @a, align 4
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store i32 %7, i32* @b, align 4
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store i32 %8, i32* @c, align 4
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store i32 %9, i32* @d, align 4
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store i32 %10, i32* @e, align 4
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store i32 %11, i32* @f, align 4
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ret i32 0
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}
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