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https://github.com/RPCS3/llvm-mirror.git
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f3278ab8cd
Summary: For SDAG, we pretend patchpoints aren't special at all until we emit the code for the pseudo. Then the verifier runs and it seems like we have a use of an undefined register (the register will be reserved later, but the verifier doesn't know that). So this patch call setUsesTOCBasePtr before emit the code for the pseudo, so verifier can know X2 is a reserved register. Reviewed By: nemanjai Differential Revision: https://reviews.llvm.org/D56148 llvm-svn: 350165
125 lines
4.6 KiB
LLVM
125 lines
4.6 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
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; RUN: llc -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
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target triple = "powerpc64-unknown-linux-gnu"
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; Trivial patchpoint codegen
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;
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define i64 @trivial_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
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entry:
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; CHECK-LABEL: trivial_patchpoint_codegen:
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; CHECK: li 12, -8531
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; CHECK-NEXT: rldic 12, 12, 32, 16
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; CHECK-NEXT: oris 12, 12, 48879
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; CHECK-NEXT: ori 12, 12, 51966
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; CHECK-LE-NEXT: std 2, 24(1)
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; CHECK-BE-NEXT: std 2, 40(1)
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; CHECK-BE-NEXT: ld 2, 8(12)
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; CHECK-BE-NEXT: ld 12, 0(12)
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; CHECK-NEXT: mtctr 12
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; CHECK-NEXT: bctrl
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; CHECK-LE-NEXT: ld 2, 24(1)
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; CHECK-BE-NEXT: ld 2, 40(1)
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; CHECK: li 12, -8531
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; CHECK-NEXT: rldic 12, 12, 32, 16
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; CHECK-NEXT: oris 12, 12, 48879
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; CHECK-NEXT: ori 12, 12, 51967
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; CHECK-LE-NEXT: std 2, 24(1)
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; CHECK-BE-NEXT: std 2, 40(1)
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; CHECK-BE-NEXT: ld 2, 8(12)
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; CHECK-BE-NEXT: ld 12, 0(12)
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; CHECK-NEXT: mtctr 12
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; CHECK-NEXT: bctrl
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; CHECK-LE-NEXT: ld 2, 24(1)
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; CHECK-BE-NEXT: ld 2, 40(1)
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; CHECK: blr
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%resolveCall2 = inttoptr i64 244837814094590 to i8*
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%result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 2, i32 40, i8* %resolveCall2, i32 4, i64 %p1, i64 %p2, i64 %p3, i64 %p4)
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%resolveCall3 = inttoptr i64 244837814094591 to i8*
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tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 40, i8* %resolveCall3, i32 2, i64 %p1, i64 %result)
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ret i64 %result
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}
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; Caller frame metadata with stackmaps. This should not be optimized
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; as a leaf function.
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;
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; CHECK-LABEL: caller_meta_leaf
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; CHECK-BE: stdu 1, -80(1)
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; CHECK-LE: stdu 1, -64(1)
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; CHECK: Ltmp
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; CHECK-BE: addi 1, 1, 80
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; CHECK-LE: addi 1, 1, 64
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; CHECK: blr
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define void @caller_meta_leaf() {
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entry:
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%metadata = alloca i64, i32 3, align 8
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store i64 11, i64* %metadata
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store i64 12, i64* %metadata
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store i64 13, i64* %metadata
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call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4, i32 0, i64* %metadata)
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ret void
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}
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; Test patchpoints reusing the same TargetConstant.
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; <rdar:15390785> Assertion failed: (CI.getNumArgOperands() >= NumArgs + 4)
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; There is no way to verify this, since it depends on memory allocation.
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; But I think it's useful to include as a working example.
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define i64 @testLowerConstant(i64 %arg, i64 %tmp2, i64 %tmp10, i64* %tmp33, i64 %tmp79) {
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entry:
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%tmp80 = add i64 %tmp79, -16
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%tmp81 = inttoptr i64 %tmp80 to i64*
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%tmp82 = load i64, i64* %tmp81, align 8
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tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 14, i32 8, i64 %arg, i64 %tmp2, i64 %tmp10, i64 %tmp82)
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tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 15, i32 48, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp82)
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%tmp83 = load i64, i64* %tmp33, align 8
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%tmp84 = add i64 %tmp83, -24
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%tmp85 = inttoptr i64 %tmp84 to i64*
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%tmp86 = load i64, i64* %tmp85, align 8
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tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 17, i32 8, i64 %arg, i64 %tmp10, i64 %tmp86)
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tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 18, i32 48, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp86)
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ret i64 10
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}
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; Test small patchpoints that don't emit calls.
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define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
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entry:
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; CHECK-LABEL: small_patchpoint_codegen:
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; CHECK: Ltmp
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; CHECK: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NOT: nop
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; CHECK: blr
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%result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* null, i32 2, i64 %p1, i64 %p2)
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ret void
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}
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; Trivial symbolic patchpoint codegen.
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declare i64 @foo(i64 %p1, i64 %p2)
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define i64 @trivial_symbolic_patchpoint_codegen(i64 %p1, i64 %p2) {
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entry:
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; CHECK-LABEL: trivial_symbolic_patchpoint_codegen:
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; CHECK: bl foo
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NOT: nop
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; CHECK: blr
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%result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 9, i32 12, i8* bitcast (i64 (i64, i64)* @foo to i8*), i32 2, i64 %p1, i64 %p2)
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ret i64 %result
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}
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declare void @llvm.experimental.stackmap(i64, i32, ...)
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declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
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declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...)
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