Devang Patel 85b3a170f5 Fix DWARF description of S registers. ... llvm-svn: 129947		2011-04-21 22:48:26 +00:00
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Alpha	If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.	2010-12-06 22:39:26 +00:00
ARM	Fix DWARF description of S registers.	2011-04-21 22:48:26 +00:00
Blackfin	Don't completely eliminate identity copies that also modify super register liveness.	2011-03-31 17:55:25 +00:00
CBackend
CellSPU	don't test for codegen of 'store undef'	2011-04-09 02:31:26 +00:00
CPP
Generic	Un-XFAIL this test for ARM. <rdar://problem/7662569>	2011-04-20 21:47:45 +00:00
MBlaze	Add scheduling information for the MBlaze backend.	2011-04-11 22:31:52 +00:00
Mips	Make tests register allocation independent again.	2011-04-19 00:14:43 +00:00
MSP430	Enhance ComputeMaskedBits to know that aligned frameindexes	2011-02-13 22:25:43 +00:00
PowerPC	These tests no longer require linear scan because reserved register coalescing is now universal.	2011-04-05 21:40:41 +00:00
PTX	ptx: fix parameter ordering	2011-04-21 10:56:58 +00:00
SPARC	These tests no longer require linear scan because reserved register coalescing is now universal.	2011-04-05 21:40:41 +00:00
SystemZ	Fix SystemZ tests	2011-03-31 23:02:12 +00:00
Thumb	Make tests register allocation independent again.	2011-04-19 00:14:43 +00:00
Thumb2	Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.	2011-04-13 00:38:32 +00:00
X86	Revert r1296656, "Fix rdar://9289512 - not folding load into compare at -O0...",	2011-04-21 16:14:46 +00:00
XCore	Fix Mips, Sparc, and XCore tests that were dependent on register allocation.	2011-03-31 18:42:43 +00:00