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ffe1c55752
This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144
18 lines
849 B
Plaintext
18 lines
849 B
Plaintext
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
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# Opcode=0 Name=PHI Format=(42)
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# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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# -------------------------------------------------------------------------------------------------
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# | 1: 1: 1: 1| 0: 0: 0: 1| 1: 0: 1: 1| 1: 1: 0: 0| 1: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 1: 0|
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# -------------------------------------------------------------------------------------------------
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# To qualify as an LSL (immediate) instruction, Inst{19-16} "should" be 0b0000, instead it is = 0b1100.
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# The instruction is UNPREDICTABLE, and is not a valid intruction.
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#
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# See also
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# A8.6.88 LSL (immediate)
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# A8.6.98 MOV (shifted register), and
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# I.1 Instruction encoding diagrams and pseudocode
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0x2 0xd1 0xbc 0xf1
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