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85dd075020
This basic combine was surprisingly missing. AMDGPU legalizes many operations in terms of 32-bit vector components, so not doing this results in many extra copies and subregister extracts that need to be cleaned up later. InstCombine already does this for the hasOneUse case. The target hook is to fix a handful of tests which break (e.g. ARM/vmov.ll) which turn from a vector materialize repeated immediate instruction to a constant vector load with more scalar copies from it. llvm-svn: 250129
19 lines
624 B
LLVM
19 lines
624 B
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
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define i64 @dotests_616() {
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; CHECK-LABEL: dotests_616
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; CHECK: movi d0, #0000000000000000
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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entry:
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%0 = bitcast <2 x i64> zeroinitializer to <8 x i16>
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%1 = and <8 x i16> zeroinitializer, %0
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%2 = icmp ne <8 x i16> %1, zeroinitializer
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%3 = extractelement <8 x i1> %2, i32 2
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%vgetq_lane285 = sext i1 %3 to i16
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%vset_lane = insertelement <4 x i16> undef, i16 %vgetq_lane285, i32 0
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%4 = bitcast <4 x i16> %vset_lane to <1 x i64>
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%vget_lane = extractelement <1 x i64> %4, i32 0
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ret i64 %vget_lane
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}
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