Bill Wendling 480ad615e4 [CodeGen] Require a name for a block addr target ... Summary: A block address may be used in inline assembly. In which case it requires a name so that the asm parser has something to parse. Creating a name for every block address is a large hammer, but is necessary because at the point when a temp symbol is created we don't necessarily know if it's used in inline asm. This ensures that it exists regardless. Reviewers: nickdesaulniers, craig.topper Subscribers: nathanchance, javed.absar, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65352 llvm-svn: 368478		2019-08-09 20:18:30 +00:00
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AArch64	[CodeGen] Require a name for a block addr target	2019-08-09 20:18:30 +00:00
AMDGPU	[MBP] Disable aggressive loop rotate in plain mode	2019-08-08 20:25:23 +00:00
ARC
ARM	[ARM][ParallelDSP] Replace SExt uses	2019-08-09 07:48:50 +00:00
AVR
BPF	[Transforms] Do not drop !preserve.access.index metadata	2019-08-03 23:41:26 +00:00
Generic
Hexagon	[MBP] Disable aggressive loop rotate in plain mode	2019-08-08 20:25:23 +00:00
Inputs
Lanai
Mips	[Mips][Codegen] Fix fast-isel mixing of FGR64 and AFGR64 registers	2019-08-09 12:02:32 +00:00
MIR	[PowerPC][Peephole] Check if extsw's second operand is a virtual register	2019-08-02 03:14:17 +00:00
MSP430
NVPTX
PowerPC	[MachinePipeliner] Avoid indeterminate order in FuncUnitSorter	2019-08-09 14:10:57 +00:00
RISCV	[MBP] Disable aggressive loop rotate in plain mode	2019-08-08 20:25:23 +00:00
SPARC
SystemZ
Thumb	[MBP] Disable aggressive loop rotate in plain mode	2019-08-08 20:25:23 +00:00
Thumb2	[ARM] Add support for MVE pre and post inc loads and stores	2019-08-08 15:27:58 +00:00
WebAssembly	[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT	2019-08-08 10:37:03 +00:00
WinCFGuard
WinEH	IR: print value numbers for unnamed function arguments	2019-08-03 14:28:34 +00:00
X86	[CodeGen] Require a name for a block addr target	2019-08-09 20:18:30 +00:00
XCore