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b9807cdcf1
llc using the host cpu features and *waning* on unknown features is probably not a good thing :-( llvm-svn: 189144
87 lines
3.8 KiB
LLVM
87 lines
3.8 KiB
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse,+sse2,+sse4.1 | FileCheck %s
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target datalayout = "e-p:32:32"
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target triple = "i686-apple-darwin8.7.2"
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define i16 @test1(float %f) nounwind {
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%tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
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%tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
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%tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
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%tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
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%tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
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%tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
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%tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
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%tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
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%tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
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%tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1]
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ret i16 %tmp69
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; CHECK-LABEL: test1:
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; CHECK: subss LCPI0_
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; CHECK: mulss LCPI0_
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; CHECK: minss LCPI0_
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}
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define i16 @test2(float %f) nounwind {
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%tmp28 = fsub float %f, 1.000000e+00 ; <float> [#uses=1]
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%tmp37 = fmul float %tmp28, 5.000000e-01 ; <float> [#uses=1]
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%tmp375 = insertelement <4 x float> undef, float %tmp37, i32 0 ; <<4 x float>> [#uses=1]
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%tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1]
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%tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> < float 0.000000e+00, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1]
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%tmp = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
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%tmp69 = trunc i32 %tmp to i16 ; <i16> [#uses=1]
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ret i16 %tmp69
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; CHECK-LABEL: test2:
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; CHECK: addss LCPI1_
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; CHECK: mulss LCPI1_
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; CHECK: minss LCPI1_
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}
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declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
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declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
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declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
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declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32)
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declare <4 x float> @f()
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define <4 x float> @test3(<4 x float> %A, float *%b, i32 %C) nounwind {
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%a = load float *%b
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%B = insertelement <4 x float> undef, float %a, i32 0
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%X = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %A, <4 x float> %B, i32 4)
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ret <4 x float> %X
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; CHECK-LABEL: test3:
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; CHECK: roundss $4, (%eax), %xmm0
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}
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define <4 x float> @test4(<4 x float> %A, float *%b, i32 %C) nounwind {
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%a = load float *%b
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%B = insertelement <4 x float> undef, float %a, i32 0
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%q = call <4 x float> @f()
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%X = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %q, <4 x float> %B, i32 4)
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ret <4 x float> %X
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; CHECK-LABEL: test4:
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; CHECK: movss (%eax), %xmm
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; CHECK: call
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; CHECK: roundss $4, %xmm{{.*}}, %xmm0
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}
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; PR13576
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define <2 x double> @test5() nounwind uwtable readnone noinline {
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entry:
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%0 = tail call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> <double
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4.569870e+02, double 1.233210e+02>, i32 128) nounwind readnone
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ret <2 x double> %0
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; CHECK-LABEL: test5:
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; CHECK: mov
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; CHECK: mov
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; CHECK: cvtsi2sd
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}
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declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
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