Francis Visoiu Mistrih 86edc13433 [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output ... As part of the unification of the debug format and the MIR format, avoid printing "vreg" for virtual registers (which is one of the current MIR possibilities). Basically: * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E "s/%vreg([0-9]+)/%\1/g" * grep -nr '%vreg' . and fix if needed * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E "s/ vreg([0-9]+)/ %\1/g" * grep -nr 'vreg[0-9]\+' . and fix if needed Differential Revision: https://reviews.llvm.org/D40420 llvm-svn: 319427		2017-11-30 12:12:19 +00:00
..
Analysis	[SCEV][NFC] Break from loop after we found first non-Phi in getAddRecExprPHILiterally	2017-11-29 10:54:16 +00:00
AsmParser	[IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags and add 'trans' fast-math-flag	2017-11-06 16:27:15 +00:00
BinaryFormat
Bitcode	[WebAssembly] Explicily disable comdat support for wasm output	2017-11-14 00:49:16 +00:00
CodeGen	[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output	2017-11-30 12:12:19 +00:00
DebugInfo	[CodeView] Factor some code out of TypeTableBuilder.	2017-11-29 22:41:56 +00:00
Demangle
ExecutionEngine	Fix 'not all control paths return a value' warning on MSVC builds	2017-11-09 14:56:17 +00:00
Fuzzer
FuzzMutate	[FuzzMutate] Fix windows build after rL318407.	2017-11-16 16:17:32 +00:00
IR	Move getVariableSize from Verifier.cpp into DIVariable::getSize() (NFC)	2017-11-28 00:57:51 +00:00
IRReader
LineEditor
Linker
LTO	Fix a bunch more layering of CodeGen headers that are in Target	2017-11-17 01:07:10 +00:00
MC	[MC] Function stack size section.	2017-11-30 12:01:16 +00:00
Object	Object: Improve COFF irsymtab comdat representation.	2017-11-21 22:06:20 +00:00
ObjectYAML	[CodeView] Refactor / Rewrite TypeSerializer and TypeTableBuilder.	2017-11-28 18:33:17 +00:00
Option
Passes	Add a new pass to speculate around PHI nodes with constant (integer) operands when profitable.	2017-11-28 11:32:31 +00:00
ProfileData	[Coverage] Use the most-recent completed region count (PR35437)	2017-11-30 00:28:23 +00:00
Support	AMDGPU: Add num spilled s/vgprs to metadata	2017-11-28 17:51:08 +00:00
TableGen
Target	[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output	2017-11-30 12:12:19 +00:00
Testing
ToolDrivers
Transforms	Revert rL319407: [SROA] enable splitting for non-whole-alloca loads and stores	2017-11-30 08:29:51 +00:00
WindowsManifest
XRay	[XRay] Use optimistic logging model for FDR mode	2017-11-21 07:16:57 +00:00
CMakeLists.txt
LLVMBuild.txt