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dbac87d1fc
Patch by Ana Pazos. - Completed implementation of instruction formats: AdvSIMD three same AdvSIMD modified immediate AdvSIMD scalar pairwise - Completed implementation of instruction classes (some of the instructions in these classes belong to yet unfinished instruction formats): Vector Arithmetic Vector Immediate Vector Pairwise Arithmetic - Initial implementation of instruction formats: AdvSIMD scalar two-reg misc AdvSIMD scalar three same - Intial implementation of instruction class: Scalar Arithmetic - Initial clang changes to support arm v8 intrinsics. Note: no clang changes for scalar intrinsics function name mangling yet. - Comprehensive test cases for added instructions To verify auto codegen, encoding, decoding, diagnosis, intrinsics. llvm-svn: 187567
87 lines
3.9 KiB
ArmAsm
87 lines
3.9 KiB
ArmAsm
// RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
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// Check that the assembler can handle the documented syntax for AArch64
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//----------------------------------------------------------------------
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// Vector Integer Mul
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//----------------------------------------------------------------------
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mul v0.8b, v1.8b, v2.8b
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mul v0.16b, v1.16b, v2.16b
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mul v0.4h, v1.4h, v2.4h
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mul v0.8h, v1.8h, v2.8h
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mul v0.2s, v1.2s, v2.2s
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mul v0.4s, v1.4s, v2.4s
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// CHECK: mul v0.8b, v1.8b, v2.8b // encoding: [0x20,0x9c,0x22,0x0e]
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// CHECK: mul v0.16b, v1.16b, v2.16b // encoding: [0x20,0x9c,0x22,0x4e]
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// CHECK: mul v0.4h, v1.4h, v2.4h // encoding: [0x20,0x9c,0x62,0x0e]
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// CHECK: mul v0.8h, v1.8h, v2.8h // encoding: [0x20,0x9c,0x62,0x4e]
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// CHECK: mul v0.2s, v1.2s, v2.2s // encoding: [0x20,0x9c,0xa2,0x0e]
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// CHECK: mul v0.4s, v1.4s, v2.4s // encoding: [0x20,0x9c,0xa2,0x4e]
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//----------------------------------------------------------------------
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// Vector Floating-Point Mul
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//----------------------------------------------------------------------
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fmul v0.2s, v1.2s, v2.2s
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fmul v0.4s, v1.4s, v2.4s
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fmul v0.2d, v1.2d, v2.2d
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// CHECK: fmul v0.2s, v1.2s, v2.2s // encoding: [0x20,0xdc,0x22,0x2e]
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// CHECK: fmul v0.4s, v1.4s, v2.4s // encoding: [0x20,0xdc,0x22,0x6e]
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// CHECK: fmul v0.2d, v1.2d, v2.2d // encoding: [0x20,0xdc,0x62,0x6e]
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//----------------------------------------------------------------------
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// Vector Floating-Point Div
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//----------------------------------------------------------------------
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fdiv v0.2s, v1.2s, v2.2s
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fdiv v0.4s, v1.4s, v2.4s
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fdiv v0.2d, v1.2d, v2.2d
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// CHECK: fdiv v0.2s, v1.2s, v2.2s // encoding: [0x20,0xfc,0x22,0x2e]
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// CHECK: fdiv v0.4s, v1.4s, v2.4s // encoding: [0x20,0xfc,0x22,0x6e]
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// CHECK: fdiv v0.2d, v1.2d, v2.2d // encoding: [0x20,0xfc,0x62,0x6e]
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//----------------------------------------------------------------------
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// Vector Multiply (Polynomial)
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//----------------------------------------------------------------------
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pmul v17.8b, v31.8b, v16.8b
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pmul v0.16b, v1.16b, v2.16b
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// CHECK: pmul v17.8b, v31.8b, v16.8b // encoding: [0xf1,0x9f,0x30,0x2e]
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// CHECK: pmul v0.16b, v1.16b, v2.16b // encoding: [0x20,0x9c,0x22,0x6e]
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//----------------------------------------------------------------------
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// Vector Saturating Doubling Multiply High
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//----------------------------------------------------------------------
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sqdmulh v2.4h, v25.4h, v3.4h
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sqdmulh v12.8h, v5.8h, v13.8h
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sqdmulh v3.2s, v1.2s, v30.2s
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// CHECK: sqdmulh v2.4h, v25.4h, v3.4h // encoding: [0x22,0xb7,0x63,0x0e]
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// CHECK: sqdmulh v12.8h, v5.8h, v13.8h // encoding: [0xac,0xb4,0x6d,0x4e]
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// CHECK: sqdmulh v3.2s, v1.2s, v30.2s // encoding: [0x23,0xb4,0xbe,0x0e]
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//----------------------------------------------------------------------
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// Vector Saturating Rouding Doubling Multiply High
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//----------------------------------------------------------------------
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sqrdmulh v2.4h, v25.4h, v3.4h
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sqrdmulh v12.8h, v5.8h, v13.8h
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sqrdmulh v3.2s, v1.2s, v30.2s
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// CHECK: sqrdmulh v2.4h, v25.4h, v3.4h // encoding: [0x22,0xb7,0x63,0x2e]
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// CHECK: sqrdmulh v12.8h, v5.8h, v13.8h // encoding: [0xac,0xb4,0x6d,0x6e]
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// CHECK: sqrdmulh v3.2s, v1.2s, v30.2s // encoding: [0x23,0xb4,0xbe,0x2e]
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//----------------------------------------------------------------------
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// Vector Multiply Extended
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//----------------------------------------------------------------------
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fmulx v21.2s, v5.2s, v13.2s
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fmulx v1.4s, v25.4s, v3.4s
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fmulx v31.2d, v22.2d, v2.2d
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// CHECK: fmulx v21.2s, v5.2s, v13.2s // encoding: [0xb5,0xdc,0x2d,0x0e]
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// CHECK: fmulx v1.4s, v25.4s, v3.4s // encoding: [0x21,0xdf,0x23,0x4e]
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// CHECK: fmulx v31.2d, v22.2d, v2.2d // encoding: [0xdf,0xde,0x62,0x4e]
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