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dbac87d1fc
Patch by Ana Pazos. - Completed implementation of instruction formats: AdvSIMD three same AdvSIMD modified immediate AdvSIMD scalar pairwise - Completed implementation of instruction classes (some of the instructions in these classes belong to yet unfinished instruction formats): Vector Arithmetic Vector Immediate Vector Pairwise Arithmetic - Initial implementation of instruction formats: AdvSIMD scalar two-reg misc AdvSIMD scalar three same - Intial implementation of instruction class: Scalar Arithmetic - Initial clang changes to support arm v8 intrinsics. Note: no clang changes for scalar intrinsics function name mangling yet. - Comprehensive test cases for added instructions To verify auto codegen, encoding, decoding, diagnosis, intrinsics. llvm-svn: 187567
29 lines
1.3 KiB
ArmAsm
29 lines
1.3 KiB
ArmAsm
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=-neon < %s 2> %t
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// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s
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fmla v3.4s, v12.4s, v17.4s
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fmla v1.2d, v30.2d, v20.2d
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fmla v9.2s, v9.2s, v0.2s
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// CHECK-ERROR: error: instruction requires a CPU feature not currently enabled
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// CHECK-ERROR-NEXT: fmla v3.4s, v12.4s, v17.4s
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// CHECK-ERROR-NEXT: ^
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// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
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// CHECK-ERROR-NEXT: fmla v1.2d, v30.2d, v20.2d
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// CHECK-ERROR-NEXT: ^
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// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
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// CHECK-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s
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// CHECK-ERROR-NEXT: ^
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fmls v3.4s, v12.4s, v17.4s
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fmls v1.2d, v30.2d, v20.2d
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fmls v9.2s, v9.2s, v0.2s
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// CHECK-ERROR: error: instruction requires a CPU feature not currently enabled
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// CHECK-ERROR-NEXT: fmls v3.4s, v12.4s, v17.4s
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// CHECK-ERROR-NEXT: ^
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// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
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// CHECK-ERROR-NEXT: fmls v1.2d, v30.2d, v20.2d
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// CHECK-ERROR-NEXT: ^
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// CHECK-ERROR-NEXT: error: instruction requires a CPU feature not currently enabled
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// CHECK-ERROR-NEXT: fmls v9.2s, v9.2s, v0.2s
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// CHECK-ERROR-NEXT: ^
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