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f8ea4e377b
Now that the WebAssembly SIMD specification is finalized and engines are generally up-to-date, there is no need for a separate target feature for gating SIMD instructions that engines have not implemented. With this change, v128.const is now enabled by default with the simd128 target feature. Differential Revision: https://reviews.llvm.org/D98457
110 lines
3.8 KiB
C++
110 lines
3.8 KiB
C++
//=- WebAssemblySubtarget.h - Define Subtarget for the WebAssembly -*- C++ -*-//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file declares the WebAssembly-specific subclass of
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/// TargetSubtarget.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
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#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSUBTARGET_H
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#include "WebAssemblyFrameLowering.h"
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#include "WebAssemblyISelLowering.h"
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#include "WebAssemblyInstrInfo.h"
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#include "WebAssemblySelectionDAGInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include <string>
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#define GET_SUBTARGETINFO_ENUM
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#define GET_SUBTARGETINFO_HEADER
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#include "WebAssemblyGenSubtargetInfo.inc"
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namespace llvm {
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// Defined in WebAssemblyGenSubtargetInfo.inc.
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extern const SubtargetFeatureKV
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WebAssemblyFeatureKV[WebAssembly::NumSubtargetFeatures];
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class WebAssemblySubtarget final : public WebAssemblyGenSubtargetInfo {
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enum SIMDEnum {
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NoSIMD,
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SIMD128,
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} SIMDLevel = NoSIMD;
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bool HasAtomics = false;
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bool HasNontrappingFPToInt = false;
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bool HasSignExt = false;
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bool HasExceptionHandling = false;
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bool HasBulkMemory = false;
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bool HasMultivalue = false;
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bool HasMutableGlobals = false;
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bool HasTailCall = false;
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bool HasReferenceTypes = false;
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/// What processor and OS we're targeting.
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Triple TargetTriple;
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WebAssemblyFrameLowering FrameLowering;
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WebAssemblyInstrInfo InstrInfo;
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WebAssemblySelectionDAGInfo TSInfo;
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WebAssemblyTargetLowering TLInfo;
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WebAssemblySubtarget &initializeSubtargetDependencies(StringRef CPU,
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StringRef FS);
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public:
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/// This constructor initializes the data members to match that
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/// of the specified triple.
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WebAssemblySubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, const TargetMachine &TM);
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const WebAssemblySelectionDAGInfo *getSelectionDAGInfo() const override {
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return &TSInfo;
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}
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const WebAssemblyFrameLowering *getFrameLowering() const override {
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return &FrameLowering;
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}
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const WebAssemblyTargetLowering *getTargetLowering() const override {
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return &TLInfo;
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}
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const WebAssemblyInstrInfo *getInstrInfo() const override {
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return &InstrInfo;
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}
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const WebAssemblyRegisterInfo *getRegisterInfo() const override {
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return &getInstrInfo()->getRegisterInfo();
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}
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const Triple &getTargetTriple() const { return TargetTriple; }
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bool enableAtomicExpand() const override;
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bool enableIndirectBrExpand() const override { return true; }
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bool enableMachineScheduler() const override;
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bool useAA() const override;
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// Predicates used by WebAssemblyInstrInfo.td.
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bool hasAddr64() const { return TargetTriple.isArch64Bit(); }
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bool hasSIMD128() const { return SIMDLevel >= SIMD128; }
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bool hasAtomics() const { return HasAtomics; }
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bool hasNontrappingFPToInt() const { return HasNontrappingFPToInt; }
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bool hasSignExt() const { return HasSignExt; }
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bool hasExceptionHandling() const { return HasExceptionHandling; }
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bool hasBulkMemory() const { return HasBulkMemory; }
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bool hasMultivalue() const { return HasMultivalue; }
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bool hasMutableGlobals() const { return HasMutableGlobals; }
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bool hasTailCall() const { return HasTailCall; }
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bool hasReferenceTypes() const { return HasReferenceTypes; }
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/// Parses features string setting specified subtarget options. Definition of
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/// function is auto generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
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};
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} // end namespace llvm
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#endif
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