1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/MC
Toma Tabacu a56ca2c37f [mips] [IAS] Do not generate redundant ORi in createLShiftOri.
Summary: If the immediate is 0, the ORi is pointless.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8969

llvm-svn: 235990
2015-04-28 14:06:35 +00:00
..
AArch64 [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin. 2015-04-28 01:37:11 +00:00
ARM [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin. 2015-04-28 01:37:11 +00:00
AsmParser [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin. 2015-04-28 01:37:11 +00:00
COFF Add a proper fix for pr23025. 2015-04-17 11:27:13 +00:00
Disassembler [PowerPC] Use sync inst alias when printing 2015-04-23 23:05:08 +00:00
ELF Use CIE version 4 for dwarf4. 2015-04-28 13:55:31 +00:00
Hexagon Expand MUX instructions early on Hexagon 2015-03-31 13:35:12 +00:00
MachO MC: For variable symbols, maintain MCSymbol::Section as a cache. 2015-04-03 01:46:11 +00:00
Markup
Mips [mips] [IAS] Do not generate redundant ORi in createLShiftOri. 2015-04-28 14:06:35 +00:00
PowerPC Use CIE version 1 for .eh_frame. 2015-04-27 22:04:24 +00:00
R600 R600/SI: Add missing -mcpu=SI to assembler test 2015-04-23 19:33:55 +00:00
Sparc
SystemZ [SystemZ] Support transactional execution on zEC12 2015-04-01 12:51:43 +00:00
X86 AVX-512: Added VPMOVx2M instructions for SKX, 2015-04-21 14:38:31 +00:00