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be0ced1166
Summary:
This is much closer to the way MIPS relocation expressions work
(%hi(foo + 2) rather than %hi(foo) + 2) and removes the need for the
various bodges in MipsAsmParser::evaluateRelocExpr().
Removing those bodges ensures that the constant stored in MCValue is the
full 32 or 64-bit (depending on ABI) offset from the symbol. This will be used
to correct the %hi/%lo matching needed to sort the relocation table correctly.
As part of this:
* Gave MCExpr::print() the ability to omit parenthesis when emitting a
symbol reference inside a MipsMCExpr operator like %hi(X). Without this
we print things like %lo(($L1)).
* %hi(%neg(%gprel(X))) is now three MipsMCExpr's instead of one. Most of
the related special cases have been removed or moved to MipsMCExpr. We
can remove the rest as we gain support for the less common relocations
when they are not part of this specific combination.
* Renamed MipsMCExpr::VariantKind and the enum prefix ('VK_') to avoid confusion
with MCSymbolRefExpr::VariantKind and its prefix (also 'VK_').
* fixup_Mips_GOT_Local and fixup_Mips_GOT_Global were found to be identical
and merged into fixup_Mips_GOT.
* MO_GOT16 and MO_GOT turned out to be identical and have been merged into
MO_GOT.
* VK_Mips_GOT and VK_Mips_GOT16 turned out to be the same thing so they
have been merged into MEK_GOT
Reviewers: sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D19716
llvm-svn: 268379
71 lines
3.7 KiB
ArmAsm
71 lines
3.7 KiB
ArmAsm
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 \
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# RUN: | FileCheck %s -check-prefix=CHECK-FIXUP
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# RUN: llvm-mc %s -filetype=obj -triple=mips-unknown-linux -mcpu=mips32r6 \
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# RUN: | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF
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#------------------------------------------------------------------------------
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# Check that the assembler can handle the documented syntax for fixups.
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#------------------------------------------------------------------------------
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# CHECK-FIXUP: addiupc $2, bar # encoding: [0xec,0b01000AAA,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC19_S2
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# CHECK-FIXUP: beqc $5, $6, bar # encoding: [0x20,0xa6,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar-4, kind: fixup_Mips_PC16
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# CHECK-FIXUP: bnec $5, $6, bar # encoding: [0x60,0xa6,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar-4, kind: fixup_Mips_PC16
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# CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar-4, kind: fixup_MIPS_PC21_S2
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# CHECK-FIXUP: bnezc $9, bar # encoding: [0xf9,0b001AAAAA,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar-4, kind: fixup_MIPS_PC21_S2
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# CHECK-FIXUP: balc bar # encoding: [0b111010AA,A,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar-4, kind: fixup_MIPS_PC26_S2
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# CHECK-FIXUP: bc bar # encoding: [0b110010AA,A,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar-4, kind: fixup_MIPS_PC26_S2
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# CHECK-FIXUP: aluipc $2, %pcrel_hi(bar) # encoding: [0xec,0x5f,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: %pcrel_hi(bar),
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# CHECK-FIXUP: kind: fixup_MIPS_PCHI16
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# CHECK-FIXUP: addiu $2, $2, %pcrel_lo(bar) # encoding: [0x24,0x42,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: %pcrel_lo(bar),
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# CHECK-FIXUP: kind: fixup_MIPS_PCLO16
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# CHECK-FIXUP: lwpc $2, bar # encoding: [0xec,0b01001AAA,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC19_S2
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# CHECK-FIXUP: lwupc $2, bar # encoding: [0xec,0b01010AAA,A,A]
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# CHECK-FIXUP: # fixup A - offset: 0,
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# CHECK-FIXUP: value: bar, kind: fixup_MIPS_PC19_S2
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#------------------------------------------------------------------------------
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# Check that the appropriate relocations were created.
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#------------------------------------------------------------------------------
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# CHECK-ELF: Relocations [
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# CHECK-ELF: 0x0 R_MIPS_PC19_S2 bar 0x0
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# CHECK-ELF: 0x4 R_MIPS_PC16 bar 0x0
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# CHECK-ELF: 0x8 R_MIPS_PC16 bar 0x0
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# CHECK-ELF: 0xC R_MIPS_PC21_S2 bar 0x0
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# CHECK-ELF: 0x10 R_MIPS_PC21_S2 bar 0x0
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# CHECK-ELF: 0x14 R_MIPS_PC26_S2 bar 0x0
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# CHECK-ELF: 0x18 R_MIPS_PC26_S2 bar 0x0
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# CHECK-ELF: 0x1C R_MIPS_PCHI16 bar 0x0
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# CHECK-ELF: 0x20 R_MIPS_PCLO16 bar 0x0
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# CHECK-ELF: 0x24 R_MIPS_PC19_S2 bar 0x0
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# CHECK-ELF: 0x28 R_MIPS_PC19_S2 bar 0x0
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# CHECK-ELF: ]
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addiupc $2,bar
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beqc $5, $6, bar
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bnec $5, $6, bar
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beqzc $9, bar
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bnezc $9, bar
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balc bar
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bc bar
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aluipc $2, %pcrel_hi(bar)
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addiu $2, $2, %pcrel_lo(bar)
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lwpc $2,bar
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lwupc $2,bar
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