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72cda64d90
This was reverted in r306252, but I already had the bug fixed and was just trying to form a test case. The original commit factored the logic for forming dedicated exits inside of LoopSimplify into a helper that could be used elsewhere and with an approach that required fewer intermediate data structures. See that commit for full details including the change to the statistic, etc. The code looked fine to me and my reviewers, but in fact didn't handle indirectbr correctly -- it left the 'InLoopPredecessors' vector dirty. If you have code that looks *just* right, you can end up leaking these predecessors into a subsequent rewrite, and crash deep down when trying to update PHI nodes for predecessors that don't exist. I've added an assert that makes the bug much more obvious, and then changed the code to reliably clear the vector so we don't get this bug again in some other form as the code changes. I've also added a test case that *does* manage to catch this while also giving some nice positive coverage in the face of indirectbr. The real code that found this came out of what I think is CPython's interpreter loop, but any code with really "creative" interpreter loops mixing indirectbr and other exit paths could manage to tickle the bug. I was hard to reduce the original test case because in addition to having a particular pattern of IR, the whole thing depends on the order of the predecessors which is in turn depends on use list order. The test case added here was designed so that in multiple different predecessor orderings it should always end up going down the same path and tripping the same bug. I hope. At least, it tripped it for me without manipulating the use list order which is better than anything bugpoint could do... llvm-svn: 306257
142 lines
5.5 KiB
LLVM
142 lines
5.5 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt -loop-unswitch -loop-unswitch-threshold 1000 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
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; RUN: opt -S -loop-unswitch -loop-unswitch-threshold 1000 -verify-loop-info -verify-dom-info < %s | FileCheck %s
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; STATS: 3 loop-unswitch - Number of switches unswitched
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; CHECK: %1 = icmp eq i32 %c, 1
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; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
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; CHECK: ..split_crit_edge: ; preds = %0
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; CHECK-NEXT: br label %.split
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; CHECK: .split.us: ; preds = %0
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; CHECK-NEXT: %2 = icmp eq i32 %d, 1
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; CHECK-NEXT: br i1 %2, label %.split.us.split.us, label %.split.us..split.us.split_crit_edge
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; CHECK: .split.us..split.us.split_crit_edge: ; preds = %.split.us
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; CHECK-NEXT: br label %.split.us.split
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; CHECK: .split.us.split.us: ; preds = %.split.us
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; CHECK-NEXT: br label %loop_begin.us.us
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; CHECK: loop_begin.us.us: ; preds = %loop_begin.backedge.us.us, %.split.us.split.us
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; CHECK-NEXT: %var_val.us.us = load i32, i32* %var
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; CHECK-NEXT: switch i32 1, label %second_switch.us.us [
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; CHECK-NEXT: i32 1, label %inc.us.us
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; CHECK: second_switch.us.us: ; preds = %loop_begin.us.us
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; CHECK-NEXT: switch i32 1, label %default.us.us [
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; CHECK-NEXT: i32 1, label %inc.us.us
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; CHECK: inc.us.us: ; preds = %second_switch.us.us, %loop_begin.us.us
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; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
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; CHECK-NEXT: br label %loop_begin.backedge.us.us
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; CHECK: .split.us.split: ; preds = %.split.us..split.us.split_crit_edge
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; CHECK-NEXT: br label %loop_begin.us
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; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us.split
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; CHECK-NEXT: %var_val.us = load i32, i32* %var
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; CHECK-NEXT: switch i32 1, label %second_switch.us [
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; CHECK-NEXT: i32 1, label %inc.us
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; CHECK: second_switch.us: ; preds = %loop_begin.us
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; CHECK-NEXT: switch i32 %d, label %default.us [
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; CHECK-NEXT: i32 1, label %second_switch.us.inc.us_crit_edge
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; CHECK-NEXT: ]
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; CHECK: second_switch.us.inc.us_crit_edge: ; preds = %second_switch.us
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; CHECK-NEXT: br i1 true, label %us-unreachable8, label %inc.us
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; CHECK: inc.us: ; preds = %second_switch.us.inc.us_crit_edge, %loop_begin.us
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; CHECK-NEXT: call void @incf() [[NOR_NUW]]
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; CHECK-NEXT: br label %loop_begin.backedge.us
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; CHECK: .split: ; preds = %..split_crit_edge
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; CHECK-NEXT: %3 = icmp eq i32 %d, 1
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; CHECK-NEXT: br i1 %3, label %.split.split.us, label %.split..split.split_crit_edge
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; CHECK: .split..split.split_crit_edge: ; preds = %.split
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; CHECK-NEXT: br label %.split.split
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; CHECK: .split.split.us: ; preds = %.split
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; CHECK-NEXT: br label %loop_begin.us1
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; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us6, %.split.split.us
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; CHECK-NEXT: %var_val.us2 = load i32, i32* %var
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; CHECK-NEXT: switch i32 %c, label %second_switch.us3 [
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; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge.us
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; CHECK-NEXT: ]
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; CHECK: second_switch.us3: ; preds = %loop_begin.us1
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; CHECK-NEXT: switch i32 1, label %default.us5 [
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; CHECK-NEXT: i32 1, label %inc.us4
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; CHECK-NEXT: ]
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; CHECK: inc.us4: ; preds = %loop_begin.inc_crit_edge.us, %second_switch.us3
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; CHECK-NEXT: call void @incf() [[NOR_NUW]]
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; CHECK-NEXT: br label %loop_begin.backedge.us6
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; CHECK: loop_begin.inc_crit_edge.us: ; preds = %loop_begin.us1
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; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa.us, label %inc.us4
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; CHECK: .split.split: ; preds = %.split..split.split_crit_edge
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; CHECK-NEXT: br label %loop_begin
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; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
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; CHECK-NEXT: %var_val = load i32, i32* %var
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; CHECK-NEXT: switch i32 %c, label %second_switch [
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; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge
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; CHECK-NEXT: ]
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; CHECK: loop_begin.inc_crit_edge: ; preds = %loop_begin
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; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa, label %inc
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; CHECK: second_switch: ; preds = %loop_begin
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; CHECK-NEXT: switch i32 %d, label %default [
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; CHECK-NEXT: i32 1, label %second_switch.inc_crit_edge
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; CHECK-NEXT: ]
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; CHECK: second_switch.inc_crit_edge: ; preds = %second_switch
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; CHECK-NEXT: br i1 true, label %us-unreachable7, label %inc
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define i32 @test(i32* %var) {
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%mem = alloca i32
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store i32 2, i32* %mem
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%c = load i32, i32* %mem
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%d = load i32, i32* %mem
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br label %loop_begin
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loop_begin:
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%var_val = load i32, i32* %var
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switch i32 %c, label %second_switch [
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i32 1, label %inc
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]
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second_switch:
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switch i32 %d, label %default [
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i32 1, label %inc
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]
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inc:
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call void @incf() noreturn nounwind
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br label %loop_begin
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default:
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br label %loop_begin
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loop_exit:
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ret i32 0
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}
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declare void @incf() noreturn
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declare void @decf() noreturn
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; CHECK: attributes #0 = { noreturn }
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; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }
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