Tony Jiang 87eac04da6 [PowerPC] Implement missing ISA 2.06 instructions. ... Instructions: fctidu[.], fctiwu[.], ftdiv, ftsqrt are not implemented. Implement them and add corresponding test cases in this patch. llvm-svn: 291116		2017-01-05 15:00:45 +00:00
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AArch64	AArch64: TableGenerate system instruction operands.	2016-07-05 21:23:04 +00:00
AMDGPU	[AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwa	2016-12-22 11:30:48 +00:00
ARM	[ARM] Saturation instructions are DSP-only	2016-07-25 22:25:25 +00:00
Hexagon	[Hexagon] Treat all conditional branches as predicted (not-taken by default)	2016-05-09 18:22:07 +00:00
Lanai	[lanai] Add Lanai backend.	2016-03-28 13:09:54 +00:00
Mips	[mips] Fix aui/daui/dahi/dati for MIPSR6	2016-10-14 09:31:42 +00:00
PowerPC	[PowerPC] Implement missing ISA 2.06 instructions.	2017-01-05 15:00:45 +00:00
Sparc	This change adds co-processor condition branching and conditional traps to the Sparc back-end.	2016-03-09 18:20:21 +00:00
SystemZ	[SystemZ] Support remaining atomic instructions	2016-12-02 18:24:16 +00:00
X86	[AVX-512] Fix a disassembler failure for AVX-512 vcmpss/vcmpsd with an immediate larger than 32. Fix the same bug with VLX vcmpps/vcmppd.	2016-11-13 19:58:18 +00:00
XCore	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00