mirror of
https://github.com/RPCS3/llvm-mirror.git
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d8e85baf5c
Summary: Use proper dataflow ordering to speed convergence. This will converge the testcase on bug 26055 in 2 iterations. (data structures speedups to come to make even that faster) Reviewers: kcc, samsonov, echristo, dblaikie, tvvikram Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D16039 llvm-svn: 257292
417 lines
15 KiB
C++
417 lines
15 KiB
C++
//===------ LiveDebugValues.cpp - Tracking Debug Value MIs ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// This pass implements a data flow analysis that propagates debug location
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/// information by inserting additional DBG_VALUE instructions into the machine
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/// instruction stream. The pass internally builds debug location liveness
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/// ranges to determine the points where additional DBG_VALUEs need to be
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/// inserted.
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///
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/// This is a separate pass from DbgValueHistoryCalculator to facilitate
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/// testing and improve modularity.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include <queue>
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#include <list>
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using namespace llvm;
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#define DEBUG_TYPE "live-debug-values"
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STATISTIC(NumInserted, "Number of DBG_VALUE instructions inserted");
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namespace {
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class LiveDebugValues : public MachineFunctionPass {
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private:
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const TargetRegisterInfo *TRI;
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const TargetInstrInfo *TII;
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typedef std::pair<const DILocalVariable *, const DILocation *>
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InlinedVariable;
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/// A potentially inlined instance of a variable.
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struct DebugVariable {
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const DILocalVariable *Var;
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const DILocation *InlinedAt;
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DebugVariable(const DILocalVariable *_var, const DILocation *_inlinedAt)
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: Var(_var), InlinedAt(_inlinedAt) {}
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bool operator==(const DebugVariable &DV) const {
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return (Var == DV.Var) && (InlinedAt == DV.InlinedAt);
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}
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};
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/// Member variables and functions for Range Extension across basic blocks.
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struct VarLoc {
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DebugVariable Var;
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const MachineInstr *MI; // MachineInstr should be a DBG_VALUE instr.
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VarLoc(DebugVariable _var, const MachineInstr *_mi) : Var(_var), MI(_mi) {}
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bool operator==(const VarLoc &V) const;
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};
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typedef std::list<VarLoc> VarLocList;
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typedef SmallDenseMap<const MachineBasicBlock *, VarLocList> VarLocInMBB;
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void transferDebugValue(MachineInstr &MI, VarLocList &OpenRanges);
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void transferRegisterDef(MachineInstr &MI, VarLocList &OpenRanges);
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bool transferTerminatorInst(MachineInstr &MI, VarLocList &OpenRanges,
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VarLocInMBB &OutLocs);
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bool transfer(MachineInstr &MI, VarLocList &OpenRanges, VarLocInMBB &OutLocs);
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bool join(MachineBasicBlock &MBB, VarLocInMBB &OutLocs, VarLocInMBB &InLocs);
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bool ExtendRanges(MachineFunction &MF);
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public:
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static char ID;
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/// Default construct and initialize the pass.
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LiveDebugValues();
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/// Tell the pass manager which passes we depend on and what
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/// information we preserve.
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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/// Print to ostream with a message.
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void printVarLocInMBB(const VarLocInMBB &V, const char *msg,
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raw_ostream &Out) const;
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/// Calculate the liveness information for the given machine function.
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bool runOnMachineFunction(MachineFunction &MF) override;
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};
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} // namespace
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//===----------------------------------------------------------------------===//
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// Implementation
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//===----------------------------------------------------------------------===//
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char LiveDebugValues::ID = 0;
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char &llvm::LiveDebugValuesID = LiveDebugValues::ID;
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INITIALIZE_PASS(LiveDebugValues, "livedebugvalues", "Live DEBUG_VALUE analysis",
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false, false)
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/// Default construct and initialize the pass.
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LiveDebugValues::LiveDebugValues() : MachineFunctionPass(ID) {
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initializeLiveDebugValuesPass(*PassRegistry::getPassRegistry());
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}
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/// Tell the pass manager which passes we depend on and what information we
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/// preserve.
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void LiveDebugValues::getAnalysisUsage(AnalysisUsage &AU) const {
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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// \brief If @MI is a DBG_VALUE with debug value described by a defined
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// register, returns the number of this register. In the other case, returns 0.
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static unsigned isDescribedByReg(const MachineInstr &MI) {
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assert(MI.isDebugValue());
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assert(MI.getNumOperands() == 4);
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// If location of variable is described using a register (directly or
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// indirecltly), this register is always a first operand.
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return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
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}
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// \brief This function takes two DBG_VALUE instructions and returns true
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// if their offsets are equal; otherwise returns false.
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static bool areOffsetsEqual(const MachineInstr &MI1, const MachineInstr &MI2) {
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assert(MI1.isDebugValue());
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assert(MI1.getNumOperands() == 4);
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assert(MI2.isDebugValue());
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assert(MI2.getNumOperands() == 4);
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if (!MI1.isIndirectDebugValue() && !MI2.isIndirectDebugValue())
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return true;
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// Check if both MIs are indirect and they are equal.
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if (MI1.isIndirectDebugValue() && MI2.isIndirectDebugValue())
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return MI1.getOperand(1).getImm() == MI2.getOperand(1).getImm();
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return false;
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}
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//===----------------------------------------------------------------------===//
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// Debug Range Extension Implementation
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//===----------------------------------------------------------------------===//
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void LiveDebugValues::printVarLocInMBB(const VarLocInMBB &V, const char *msg,
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raw_ostream &Out) const {
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Out << "Printing " << msg << ":\n";
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for (const auto &L : V) {
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Out << "MBB: " << L.first->getName() << ":\n";
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for (const auto &VLL : L.second) {
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Out << " Var: " << VLL.Var.Var->getName();
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Out << " MI: ";
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(*VLL.MI).dump();
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Out << "\n";
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}
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}
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Out << "\n";
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}
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bool LiveDebugValues::VarLoc::operator==(const VarLoc &V) const {
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return (Var == V.Var) && (isDescribedByReg(*MI) == isDescribedByReg(*V.MI)) &&
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(areOffsetsEqual(*MI, *V.MI));
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}
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/// End all previous ranges related to @MI and start a new range from @MI
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/// if it is a DBG_VALUE instr.
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void LiveDebugValues::transferDebugValue(MachineInstr &MI,
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VarLocList &OpenRanges) {
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if (!MI.isDebugValue())
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return;
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const DILocalVariable *RawVar = MI.getDebugVariable();
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assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
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"Expected inlined-at fields to agree");
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DebugVariable Var(RawVar, MI.getDebugLoc()->getInlinedAt());
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// End all previous ranges of Var.
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OpenRanges.erase(
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std::remove_if(OpenRanges.begin(), OpenRanges.end(),
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[&](const VarLoc &V) { return (Var == V.Var); }),
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OpenRanges.end());
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// Add Var to OpenRanges from this DBG_VALUE.
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// TODO: Currently handles DBG_VALUE which has only reg as location.
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if (isDescribedByReg(MI)) {
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VarLoc V(Var, &MI);
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OpenRanges.push_back(std::move(V));
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}
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}
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/// A definition of a register may mark the end of a range.
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void LiveDebugValues::transferRegisterDef(MachineInstr &MI,
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VarLocList &OpenRanges) {
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for (const MachineOperand &MO : MI.operands()) {
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if (!(MO.isReg() && MO.isDef() && MO.getReg() &&
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TRI->isPhysicalRegister(MO.getReg())))
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continue;
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// Remove ranges of all aliased registers.
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for (MCRegAliasIterator RAI(MO.getReg(), TRI, true); RAI.isValid(); ++RAI)
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OpenRanges.erase(std::remove_if(OpenRanges.begin(), OpenRanges.end(),
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[&](const VarLoc &V) {
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return (*RAI ==
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isDescribedByReg(*V.MI));
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}),
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OpenRanges.end());
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}
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}
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/// Terminate all open ranges at the end of the current basic block.
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bool LiveDebugValues::transferTerminatorInst(MachineInstr &MI,
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VarLocList &OpenRanges,
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VarLocInMBB &OutLocs) {
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bool Changed = false;
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const MachineBasicBlock *CurMBB = MI.getParent();
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if (!(MI.isTerminator() || (&MI == &CurMBB->instr_back())))
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return false;
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if (OpenRanges.empty())
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return false;
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VarLocList &VLL = OutLocs[CurMBB];
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for (auto OR : OpenRanges) {
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// Copy OpenRanges to OutLocs, if not already present.
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assert(OR.MI->isDebugValue());
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DEBUG(dbgs() << "Add to OutLocs: "; OR.MI->dump(););
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if (std::find_if(VLL.begin(), VLL.end(),
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[&](const VarLoc &V) { return (OR == V); }) == VLL.end()) {
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VLL.push_back(std::move(OR));
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Changed = true;
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}
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}
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OpenRanges.clear();
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return Changed;
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}
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/// This routine creates OpenRanges and OutLocs.
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bool LiveDebugValues::transfer(MachineInstr &MI, VarLocList &OpenRanges,
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VarLocInMBB &OutLocs) {
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bool Changed = false;
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transferDebugValue(MI, OpenRanges);
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transferRegisterDef(MI, OpenRanges);
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Changed = transferTerminatorInst(MI, OpenRanges, OutLocs);
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return Changed;
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}
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/// This routine joins the analysis results of all incoming edges in @MBB by
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/// inserting a new DBG_VALUE instruction at the start of the @MBB - if the same
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/// source variable in all the predecessors of @MBB reside in the same location.
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bool LiveDebugValues::join(MachineBasicBlock &MBB, VarLocInMBB &OutLocs,
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VarLocInMBB &InLocs) {
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DEBUG(dbgs() << "join MBB: " << MBB.getName() << "\n");
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bool Changed = false;
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VarLocList InLocsT; // Temporary incoming locations.
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// For all predecessors of this MBB, find the set of VarLocs that can be
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// joined.
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for (auto p : MBB.predecessors()) {
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auto OL = OutLocs.find(p);
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// Join is null in case of empty OutLocs from any of the pred.
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if (OL == OutLocs.end())
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return false;
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// Just copy over the Out locs to incoming locs for the first predecessor.
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if (p == *MBB.pred_begin()) {
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InLocsT = OL->second;
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continue;
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}
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// Join with this predecessor.
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VarLocList &VLL = OL->second;
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InLocsT.erase(
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std::remove_if(InLocsT.begin(), InLocsT.end(), [&](VarLoc &ILT) {
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return (std::find_if(VLL.begin(), VLL.end(), [&](const VarLoc &V) {
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return (ILT == V);
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}) == VLL.end());
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}), InLocsT.end());
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}
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if (InLocsT.empty())
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return false;
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VarLocList &ILL = InLocs[&MBB];
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// Insert DBG_VALUE instructions, if not already inserted.
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for (auto ILT : InLocsT) {
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if (std::find_if(ILL.begin(), ILL.end(), [&](const VarLoc &I) {
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return (ILT == I);
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}) == ILL.end()) {
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// This VarLoc is not found in InLocs i.e. it is not yet inserted. So, a
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// new range is started for the var from the mbb's beginning by inserting
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// a new DBG_VALUE. transfer() will end this range however appropriate.
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const MachineInstr *DMI = ILT.MI;
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MachineInstr *MI =
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BuildMI(MBB, MBB.instr_begin(), DMI->getDebugLoc(), DMI->getDesc(),
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DMI->isIndirectDebugValue(), DMI->getOperand(0).getReg(), 0,
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DMI->getDebugVariable(), DMI->getDebugExpression());
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if (DMI->isIndirectDebugValue())
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MI->getOperand(1).setImm(DMI->getOperand(1).getImm());
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DEBUG(dbgs() << "Inserted: "; MI->dump(););
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++NumInserted;
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Changed = true;
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VarLoc V(ILT.Var, MI);
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ILL.push_back(std::move(V));
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}
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}
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return Changed;
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}
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/// Calculate the liveness information for the given machine function and
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/// extend ranges across basic blocks.
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bool LiveDebugValues::ExtendRanges(MachineFunction &MF) {
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DEBUG(dbgs() << "\nDebug Range Extension\n");
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bool Changed = false;
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bool OLChanged = false;
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bool MBBJoined = false;
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VarLocList OpenRanges; // Ranges that are open until end of bb.
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VarLocInMBB OutLocs; // Ranges that exist beyond bb.
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VarLocInMBB InLocs; // Ranges that are incoming after joining.
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DenseMap<unsigned int, MachineBasicBlock *> OrderToBB;
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DenseMap<MachineBasicBlock *, unsigned int> BBToOrder;
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std::priority_queue<unsigned int, std::vector<unsigned int>,
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std::greater<unsigned int>> Worklist;
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std::priority_queue<unsigned int, std::vector<unsigned int>,
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std::greater<unsigned int>> Pending;
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// Initialize every mbb with OutLocs.
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for (auto &MBB : MF)
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for (auto &MI : MBB)
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transfer(MI, OpenRanges, OutLocs);
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DEBUG(printVarLocInMBB(OutLocs, "OutLocs after initialization", dbgs()));
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ReversePostOrderTraversal<MachineFunction *> RPOT(&MF);
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unsigned int RPONumber = 0;
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for (auto RI = RPOT.begin(), RE = RPOT.end(); RI != RE; ++RI) {
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OrderToBB[RPONumber] = *RI;
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BBToOrder[*RI] = RPONumber;
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Worklist.push(RPONumber);
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++RPONumber;
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}
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// This is a standard "union of predecessor outs" dataflow problem.
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// To solve it, we perform join() and transfer() using the two worklist method
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// until the ranges converge.
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// Ranges have converged when both worklists are empty.
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while (!Worklist.empty() || !Pending.empty()) {
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// We track what is on the pending worklist to avoid inserting the same
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// thing twice. We could avoid this with a custom priority queue, but this
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// is probably not worth it.
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SmallPtrSet<MachineBasicBlock *, 16> OnPending;
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while (!Worklist.empty()) {
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MachineBasicBlock *MBB = OrderToBB[Worklist.top()];
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Worklist.pop();
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MBBJoined = join(*MBB, OutLocs, InLocs);
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if (MBBJoined) {
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MBBJoined = false;
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Changed = true;
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for (auto &MI : *MBB)
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OLChanged |= transfer(MI, OpenRanges, OutLocs);
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DEBUG(printVarLocInMBB(OutLocs, "OutLocs after propagating", dbgs()));
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DEBUG(printVarLocInMBB(InLocs, "InLocs after propagating", dbgs()));
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if (OLChanged) {
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OLChanged = false;
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for (auto s : MBB->successors())
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if (!OnPending.count(s)) {
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OnPending.insert(s);
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Pending.push(BBToOrder[s]);
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}
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}
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}
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}
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Worklist.swap(Pending);
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// At this point, pending must be empty, since it was just the empty
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// worklist
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assert(Pending.empty() && "Pending should be empty");
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}
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DEBUG(printVarLocInMBB(OutLocs, "Final OutLocs", dbgs()));
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DEBUG(printVarLocInMBB(InLocs, "Final InLocs", dbgs()));
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return Changed;
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}
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bool LiveDebugValues::runOnMachineFunction(MachineFunction &MF) {
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TRI = MF.getSubtarget().getRegisterInfo();
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TII = MF.getSubtarget().getInstrInfo();
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bool Changed = false;
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Changed |= ExtendRanges(MF);
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return Changed;
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}
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