Ganesh Gopalasubramanian 9a9159179f [X86] AMD znver2 enablement ... This patch enables the following 1) AMD family 17h "znver2" tune flag (-march, -mcpu). 2) ISAs that are enabled for "znver2" architecture. 3) For the time being, it uses the znver1 scheduler model. 4) Tests are updated. 5) Scheduler descriptions are yet to be put in place. Reviewers: craig.topper Differential Revision: https://reviews.llvm.org/D58343 llvm-svn: 354897		2019-02-26 16:55:10 +00:00
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llvm	[X86] AMD znver2 enablement	2019-02-26 16:55:10 +00:00
llvm-c	[LLVM-C] Add bindings to create enumerators	2019-02-17 21:25:47 +00:00