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abb4b9d9ee
The tail duplication pass uses an assumed layout when making duplication decisions. This is fine, but passes up duplication opportunities that may arise when blocks are outlined. Because we want the updated CFG to affect subsequent placement decisions, this change must occur during placement. In order to achieve this goal, TailDuplicationPass is split into a utility class, TailDuplicator, and the pass itself. The pass delegates nearly everything to the TailDuplicator object, except for looping over the blocks in a function. This allows the same code to be used for tail duplication in both places. This change, in concert with outlining optional branches, allows triangle shaped code to perform much better, esepecially when the taken/untaken branches are correlated, as it creates a second spine when the tests are small enough. Issue from previous rollback fixed, and a new test was added for that case as well. Issue was worklist/scheduling/taildup issue in layout. Issue from 2nd rollback fixed, with 2 additional tests. Issue was tail merging/loop info/tail-duplication causing issue with loops that share a header block. Issue with early tail-duplication of blocks that branch to a fallthrough predecessor fixed with test case: tail-dup-branch-to-fallthrough.ll Differential revision: https://reviews.llvm.org/D18226 llvm-svn: 283934
138 lines
3.9 KiB
LLVM
138 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
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; cmp with single-use load, should not form branch.
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define i32 @test1(double %a, double* nocapture %b, i32 %x, i32 %y) {
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; CHECK-LABEL: test1:
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; CHECK: # BB#0:
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; CHECK-NEXT: ucomisd (%rdi), %xmm0
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; CHECK-NEXT: cmovbel %edx, %esi
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: retq
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;
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%load = load double, double* %b, align 8
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%cmp = fcmp olt double %load, %a
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%cond = select i1 %cmp, i32 %x, i32 %y
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ret i32 %cond
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}
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; Sanity check: no load.
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define i32 @test2(double %a, double %b, i32 %x, i32 %y) {
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; CHECK-LABEL: test2:
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; CHECK: # BB#0:
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; CHECK-NEXT: ucomisd %xmm1, %xmm0
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; CHECK-NEXT: cmovbel %esi, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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;
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%cmp = fcmp ogt double %a, %b
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%cond = select i1 %cmp, i32 %x, i32 %y
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ret i32 %cond
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}
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; Multiple uses of the load.
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define i32 @test4(i32 %a, i32* nocapture %b, i32 %x, i32 %y) {
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; CHECK-LABEL: test4:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl (%rsi), %eax
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; CHECK-NEXT: cmpl %edi, %eax
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; CHECK-NEXT: cmovael %ecx, %edx
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; CHECK-NEXT: addl %edx, %eax
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; CHECK-NEXT: retq
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;
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%load = load i32, i32* %b, align 4
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%cmp = icmp ult i32 %load, %a
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%cond = select i1 %cmp, i32 %x, i32 %y
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%add = add i32 %cond, %load
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ret i32 %add
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}
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; Multiple uses of the cmp.
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define i32 @test5(i32 %a, i32* nocapture %b, i32 %x, i32 %y) {
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; CHECK-LABEL: test5:
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; CHECK: # BB#0:
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; CHECK-NEXT: cmpl %edi, (%rsi)
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; CHECK-NEXT: cmoval %edi, %ecx
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; CHECK-NEXT: cmovael %edx, %ecx
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: retq
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;
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%load = load i32, i32* %b, align 4
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%cmp = icmp ult i32 %load, %a
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%cmp1 = icmp ugt i32 %load, %a
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%cond = select i1 %cmp1, i32 %a, i32 %y
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%cond5 = select i1 %cmp, i32 %cond, i32 %x
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ret i32 %cond5
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}
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; If a select is not obviously predictable, don't turn it into a branch.
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define i32 @weighted_select1(i32 %a, i32 %b) {
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; CHECK-LABEL: weighted_select1:
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; CHECK: # BB#0:
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: cmovnel %edi, %esi
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: retq
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;
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !0
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ret i32 %sel
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}
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; If a select is obviously predictable, turn it into a branch.
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define i32 @weighted_select2(i32 %a, i32 %b) {
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; CHECK-LABEL: weighted_select2:
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; CHECK: # BB#0:
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: jne [[LABEL_BB5:.*]]
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; CHECK: movl %esi, %edi
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; CHECK-NEXT: [[LABEL_BB5]]
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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;
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !1
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ret i32 %sel
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}
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; Note the reversed profile weights: it doesn't matter if it's
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; obviously true or obviously false.
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; Either one should become a branch rather than conditional move.
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; TODO: But likely true vs. likely false should affect basic block placement?
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define i32 @weighted_select3(i32 %a, i32 %b) {
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; CHECK-LABEL: weighted_select3:
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; CHECK: # BB#0:
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: je [[LABEL_BB6:.*]]
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; CHECK: movl %edi, %eax
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; CHECK-NEXT: retq
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; CHECK: [[LABEL_BB6]]
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; CHECK-NEXT: movl %esi, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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;
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !2
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ret i32 %sel
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}
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; Weightlessness is no reason to die.
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define i32 @unweighted_select(i32 %a, i32 %b) {
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; CHECK-LABEL: unweighted_select:
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; CHECK: # BB#0:
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; CHECK-NEXT: testl %edi, %edi
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; CHECK-NEXT: cmovnel %edi, %esi
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; CHECK-NEXT: movl %esi, %eax
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; CHECK-NEXT: retq
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;
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%cmp = icmp ne i32 %a, 0
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%sel = select i1 %cmp, i32 %a, i32 %b, !prof !3
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ret i32 %sel
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}
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!0 = !{!"branch_weights", i32 1, i32 99}
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!1 = !{!"branch_weights", i32 1, i32 100}
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!2 = !{!"branch_weights", i32 100, i32 1}
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!3 = !{!"branch_weights", i32 0, i32 0}
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