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https://github.com/RPCS3/llvm-mirror.git
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db20f1e2c5
Instead, represent the mask as out-of-line data in the instruction. This should be more efficient in the places that currently use getShuffleVector(), and paves the way for further changes to add new shuffles for scalable vectors. This doesn't change the syntax in textual IR. And I don't currently plan to change the bitcode encoding in this patch, although we'll probably need to do something once we extend shufflevector for scalable types. I expect that once this is finished, we can then replace the raw "mask" with something more appropriate for scalable vectors. Not sure exactly what this looks like at the moment, but there are a few different ways we could handle it. Maybe we could try to describe specific shuffles. Or maybe we could define it in terms of a function to convert a fixed-length array into an appropriate scalable vector, using a "step", or something like that. Differential Revision: https://reviews.llvm.org/D72467
768 lines
26 KiB
C++
768 lines
26 KiB
C++
//===-- Instruction.cpp - Implement the Instruction class -----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Instruction class for the IR library.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/MDBuilder.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/IR/Type.h"
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using namespace llvm;
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Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
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Instruction *InsertBefore)
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: User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
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// If requested, insert this instruction into a basic block...
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if (InsertBefore) {
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BasicBlock *BB = InsertBefore->getParent();
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assert(BB && "Instruction to insert before is not in a basic block!");
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BB->getInstList().insert(InsertBefore->getIterator(), this);
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}
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}
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Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
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BasicBlock *InsertAtEnd)
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: User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
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// append this instruction into the basic block
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assert(InsertAtEnd && "Basic block to append to may not be NULL!");
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InsertAtEnd->getInstList().push_back(this);
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}
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Instruction::~Instruction() {
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assert(!Parent && "Instruction still linked in the program!");
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if (hasMetadataHashEntry())
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clearMetadataHashEntries();
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}
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void Instruction::setParent(BasicBlock *P) {
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Parent = P;
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}
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const Module *Instruction::getModule() const {
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return getParent()->getModule();
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}
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const Function *Instruction::getFunction() const {
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return getParent()->getParent();
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}
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void Instruction::removeFromParent() {
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getParent()->getInstList().remove(getIterator());
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}
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iplist<Instruction>::iterator Instruction::eraseFromParent() {
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return getParent()->getInstList().erase(getIterator());
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}
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/// Insert an unlinked instruction into a basic block immediately before the
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/// specified instruction.
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void Instruction::insertBefore(Instruction *InsertPos) {
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InsertPos->getParent()->getInstList().insert(InsertPos->getIterator(), this);
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}
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/// Insert an unlinked instruction into a basic block immediately after the
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/// specified instruction.
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void Instruction::insertAfter(Instruction *InsertPos) {
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InsertPos->getParent()->getInstList().insertAfter(InsertPos->getIterator(),
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this);
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}
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/// Unlink this instruction from its current basic block and insert it into the
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/// basic block that MovePos lives in, right before MovePos.
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void Instruction::moveBefore(Instruction *MovePos) {
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moveBefore(*MovePos->getParent(), MovePos->getIterator());
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}
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void Instruction::moveAfter(Instruction *MovePos) {
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moveBefore(*MovePos->getParent(), ++MovePos->getIterator());
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}
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void Instruction::moveBefore(BasicBlock &BB,
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SymbolTableList<Instruction>::iterator I) {
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assert(I == BB.end() || I->getParent() == &BB);
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BB.getInstList().splice(I, getParent()->getInstList(), getIterator());
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}
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bool Instruction::comesBefore(const Instruction *Other) const {
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assert(Parent && Other->Parent &&
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"instructions without BB parents have no order");
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assert(Parent == Other->Parent && "cross-BB instruction order comparison");
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if (!Parent->isInstrOrderValid())
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Parent->renumberInstructions();
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return Order < Other->Order;
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}
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void Instruction::setHasNoUnsignedWrap(bool b) {
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cast<OverflowingBinaryOperator>(this)->setHasNoUnsignedWrap(b);
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}
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void Instruction::setHasNoSignedWrap(bool b) {
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cast<OverflowingBinaryOperator>(this)->setHasNoSignedWrap(b);
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}
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void Instruction::setIsExact(bool b) {
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cast<PossiblyExactOperator>(this)->setIsExact(b);
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}
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bool Instruction::hasNoUnsignedWrap() const {
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return cast<OverflowingBinaryOperator>(this)->hasNoUnsignedWrap();
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}
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bool Instruction::hasNoSignedWrap() const {
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return cast<OverflowingBinaryOperator>(this)->hasNoSignedWrap();
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}
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void Instruction::dropPoisonGeneratingFlags() {
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switch (getOpcode()) {
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case Instruction::Add:
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case Instruction::Sub:
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case Instruction::Mul:
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case Instruction::Shl:
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cast<OverflowingBinaryOperator>(this)->setHasNoUnsignedWrap(false);
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cast<OverflowingBinaryOperator>(this)->setHasNoSignedWrap(false);
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break;
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case Instruction::UDiv:
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case Instruction::SDiv:
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case Instruction::AShr:
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case Instruction::LShr:
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cast<PossiblyExactOperator>(this)->setIsExact(false);
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break;
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case Instruction::GetElementPtr:
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cast<GetElementPtrInst>(this)->setIsInBounds(false);
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break;
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}
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// TODO: FastMathFlags!
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}
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bool Instruction::isExact() const {
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return cast<PossiblyExactOperator>(this)->isExact();
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}
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void Instruction::setFast(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setFast(B);
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}
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void Instruction::setHasAllowReassoc(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasAllowReassoc(B);
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}
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void Instruction::setHasNoNaNs(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasNoNaNs(B);
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}
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void Instruction::setHasNoInfs(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasNoInfs(B);
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}
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void Instruction::setHasNoSignedZeros(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasNoSignedZeros(B);
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}
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void Instruction::setHasAllowReciprocal(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasAllowReciprocal(B);
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}
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void Instruction::setHasApproxFunc(bool B) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setHasApproxFunc(B);
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}
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void Instruction::setFastMathFlags(FastMathFlags FMF) {
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assert(isa<FPMathOperator>(this) && "setting fast-math flag on invalid op");
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cast<FPMathOperator>(this)->setFastMathFlags(FMF);
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}
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void Instruction::copyFastMathFlags(FastMathFlags FMF) {
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assert(isa<FPMathOperator>(this) && "copying fast-math flag on invalid op");
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cast<FPMathOperator>(this)->copyFastMathFlags(FMF);
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}
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bool Instruction::isFast() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->isFast();
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}
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bool Instruction::hasAllowReassoc() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasAllowReassoc();
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}
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bool Instruction::hasNoNaNs() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasNoNaNs();
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}
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bool Instruction::hasNoInfs() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasNoInfs();
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}
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bool Instruction::hasNoSignedZeros() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasNoSignedZeros();
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}
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bool Instruction::hasAllowReciprocal() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasAllowReciprocal();
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}
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bool Instruction::hasAllowContract() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasAllowContract();
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}
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bool Instruction::hasApproxFunc() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->hasApproxFunc();
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}
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FastMathFlags Instruction::getFastMathFlags() const {
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assert(isa<FPMathOperator>(this) && "getting fast-math flag on invalid op");
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return cast<FPMathOperator>(this)->getFastMathFlags();
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}
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void Instruction::copyFastMathFlags(const Instruction *I) {
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copyFastMathFlags(I->getFastMathFlags());
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}
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void Instruction::copyIRFlags(const Value *V, bool IncludeWrapFlags) {
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// Copy the wrapping flags.
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if (IncludeWrapFlags && isa<OverflowingBinaryOperator>(this)) {
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if (auto *OB = dyn_cast<OverflowingBinaryOperator>(V)) {
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setHasNoSignedWrap(OB->hasNoSignedWrap());
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setHasNoUnsignedWrap(OB->hasNoUnsignedWrap());
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}
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}
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// Copy the exact flag.
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if (auto *PE = dyn_cast<PossiblyExactOperator>(V))
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if (isa<PossiblyExactOperator>(this))
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setIsExact(PE->isExact());
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// Copy the fast-math flags.
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if (auto *FP = dyn_cast<FPMathOperator>(V))
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if (isa<FPMathOperator>(this))
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copyFastMathFlags(FP->getFastMathFlags());
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if (auto *SrcGEP = dyn_cast<GetElementPtrInst>(V))
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if (auto *DestGEP = dyn_cast<GetElementPtrInst>(this))
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DestGEP->setIsInBounds(SrcGEP->isInBounds() | DestGEP->isInBounds());
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}
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void Instruction::andIRFlags(const Value *V) {
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if (auto *OB = dyn_cast<OverflowingBinaryOperator>(V)) {
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if (isa<OverflowingBinaryOperator>(this)) {
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setHasNoSignedWrap(hasNoSignedWrap() & OB->hasNoSignedWrap());
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setHasNoUnsignedWrap(hasNoUnsignedWrap() & OB->hasNoUnsignedWrap());
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}
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}
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if (auto *PE = dyn_cast<PossiblyExactOperator>(V))
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if (isa<PossiblyExactOperator>(this))
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setIsExact(isExact() & PE->isExact());
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if (auto *FP = dyn_cast<FPMathOperator>(V)) {
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if (isa<FPMathOperator>(this)) {
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FastMathFlags FM = getFastMathFlags();
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FM &= FP->getFastMathFlags();
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copyFastMathFlags(FM);
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}
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}
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if (auto *SrcGEP = dyn_cast<GetElementPtrInst>(V))
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if (auto *DestGEP = dyn_cast<GetElementPtrInst>(this))
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DestGEP->setIsInBounds(SrcGEP->isInBounds() & DestGEP->isInBounds());
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}
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const char *Instruction::getOpcodeName(unsigned OpCode) {
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switch (OpCode) {
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// Terminators
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case Ret: return "ret";
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case Br: return "br";
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case Switch: return "switch";
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case IndirectBr: return "indirectbr";
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case Invoke: return "invoke";
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case Resume: return "resume";
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case Unreachable: return "unreachable";
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case CleanupRet: return "cleanupret";
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case CatchRet: return "catchret";
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case CatchPad: return "catchpad";
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case CatchSwitch: return "catchswitch";
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case CallBr: return "callbr";
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// Standard unary operators...
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case FNeg: return "fneg";
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// Standard binary operators...
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case Add: return "add";
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case FAdd: return "fadd";
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case Sub: return "sub";
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case FSub: return "fsub";
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case Mul: return "mul";
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case FMul: return "fmul";
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case UDiv: return "udiv";
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case SDiv: return "sdiv";
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case FDiv: return "fdiv";
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case URem: return "urem";
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case SRem: return "srem";
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case FRem: return "frem";
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// Logical operators...
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case And: return "and";
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case Or : return "or";
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case Xor: return "xor";
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// Memory instructions...
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case Alloca: return "alloca";
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case Load: return "load";
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case Store: return "store";
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case AtomicCmpXchg: return "cmpxchg";
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case AtomicRMW: return "atomicrmw";
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case Fence: return "fence";
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case GetElementPtr: return "getelementptr";
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// Convert instructions...
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case Trunc: return "trunc";
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case ZExt: return "zext";
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case SExt: return "sext";
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case FPTrunc: return "fptrunc";
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case FPExt: return "fpext";
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case FPToUI: return "fptoui";
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case FPToSI: return "fptosi";
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case UIToFP: return "uitofp";
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case SIToFP: return "sitofp";
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case IntToPtr: return "inttoptr";
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case PtrToInt: return "ptrtoint";
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case BitCast: return "bitcast";
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case AddrSpaceCast: return "addrspacecast";
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// Other instructions...
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case ICmp: return "icmp";
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case FCmp: return "fcmp";
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case PHI: return "phi";
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case Select: return "select";
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case Call: return "call";
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case Shl: return "shl";
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case LShr: return "lshr";
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case AShr: return "ashr";
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case VAArg: return "va_arg";
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case ExtractElement: return "extractelement";
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case InsertElement: return "insertelement";
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case ShuffleVector: return "shufflevector";
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case ExtractValue: return "extractvalue";
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case InsertValue: return "insertvalue";
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case LandingPad: return "landingpad";
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case CleanupPad: return "cleanuppad";
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case Freeze: return "freeze";
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default: return "<Invalid operator> ";
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}
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}
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/// Return true if both instructions have the same special state. This must be
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/// kept in sync with FunctionComparator::cmpOperations in
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/// lib/Transforms/IPO/MergeFunctions.cpp.
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static bool haveSameSpecialState(const Instruction *I1, const Instruction *I2,
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bool IgnoreAlignment = false) {
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assert(I1->getOpcode() == I2->getOpcode() &&
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"Can not compare special state of different instructions");
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if (const AllocaInst *AI = dyn_cast<AllocaInst>(I1))
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return AI->getAllocatedType() == cast<AllocaInst>(I2)->getAllocatedType() &&
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(AI->getAlignment() == cast<AllocaInst>(I2)->getAlignment() ||
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IgnoreAlignment);
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if (const LoadInst *LI = dyn_cast<LoadInst>(I1))
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return LI->isVolatile() == cast<LoadInst>(I2)->isVolatile() &&
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(LI->getAlignment() == cast<LoadInst>(I2)->getAlignment() ||
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IgnoreAlignment) &&
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LI->getOrdering() == cast<LoadInst>(I2)->getOrdering() &&
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LI->getSyncScopeID() == cast<LoadInst>(I2)->getSyncScopeID();
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if (const StoreInst *SI = dyn_cast<StoreInst>(I1))
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return SI->isVolatile() == cast<StoreInst>(I2)->isVolatile() &&
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(SI->getAlignment() == cast<StoreInst>(I2)->getAlignment() ||
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IgnoreAlignment) &&
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SI->getOrdering() == cast<StoreInst>(I2)->getOrdering() &&
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SI->getSyncScopeID() == cast<StoreInst>(I2)->getSyncScopeID();
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if (const CmpInst *CI = dyn_cast<CmpInst>(I1))
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return CI->getPredicate() == cast<CmpInst>(I2)->getPredicate();
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if (const CallInst *CI = dyn_cast<CallInst>(I1))
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return CI->isTailCall() == cast<CallInst>(I2)->isTailCall() &&
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CI->getCallingConv() == cast<CallInst>(I2)->getCallingConv() &&
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CI->getAttributes() == cast<CallInst>(I2)->getAttributes() &&
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CI->hasIdenticalOperandBundleSchema(*cast<CallInst>(I2));
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if (const InvokeInst *CI = dyn_cast<InvokeInst>(I1))
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return CI->getCallingConv() == cast<InvokeInst>(I2)->getCallingConv() &&
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CI->getAttributes() == cast<InvokeInst>(I2)->getAttributes() &&
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CI->hasIdenticalOperandBundleSchema(*cast<InvokeInst>(I2));
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if (const CallBrInst *CI = dyn_cast<CallBrInst>(I1))
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return CI->getCallingConv() == cast<CallBrInst>(I2)->getCallingConv() &&
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CI->getAttributes() == cast<CallBrInst>(I2)->getAttributes() &&
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CI->hasIdenticalOperandBundleSchema(*cast<CallBrInst>(I2));
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if (const InsertValueInst *IVI = dyn_cast<InsertValueInst>(I1))
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return IVI->getIndices() == cast<InsertValueInst>(I2)->getIndices();
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if (const ExtractValueInst *EVI = dyn_cast<ExtractValueInst>(I1))
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return EVI->getIndices() == cast<ExtractValueInst>(I2)->getIndices();
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if (const FenceInst *FI = dyn_cast<FenceInst>(I1))
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return FI->getOrdering() == cast<FenceInst>(I2)->getOrdering() &&
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FI->getSyncScopeID() == cast<FenceInst>(I2)->getSyncScopeID();
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if (const AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(I1))
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return CXI->isVolatile() == cast<AtomicCmpXchgInst>(I2)->isVolatile() &&
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CXI->isWeak() == cast<AtomicCmpXchgInst>(I2)->isWeak() &&
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CXI->getSuccessOrdering() ==
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cast<AtomicCmpXchgInst>(I2)->getSuccessOrdering() &&
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CXI->getFailureOrdering() ==
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cast<AtomicCmpXchgInst>(I2)->getFailureOrdering() &&
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CXI->getSyncScopeID() ==
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cast<AtomicCmpXchgInst>(I2)->getSyncScopeID();
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if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I1))
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return RMWI->getOperation() == cast<AtomicRMWInst>(I2)->getOperation() &&
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RMWI->isVolatile() == cast<AtomicRMWInst>(I2)->isVolatile() &&
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RMWI->getOrdering() == cast<AtomicRMWInst>(I2)->getOrdering() &&
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RMWI->getSyncScopeID() == cast<AtomicRMWInst>(I2)->getSyncScopeID();
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if (const ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(I1))
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return SVI->getShuffleMask() ==
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cast<ShuffleVectorInst>(I2)->getShuffleMask();
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|
|
return true;
|
|
}
|
|
|
|
bool Instruction::isIdenticalTo(const Instruction *I) const {
|
|
return isIdenticalToWhenDefined(I) &&
|
|
SubclassOptionalData == I->SubclassOptionalData;
|
|
}
|
|
|
|
bool Instruction::isIdenticalToWhenDefined(const Instruction *I) const {
|
|
if (getOpcode() != I->getOpcode() ||
|
|
getNumOperands() != I->getNumOperands() ||
|
|
getType() != I->getType())
|
|
return false;
|
|
|
|
// If both instructions have no operands, they are identical.
|
|
if (getNumOperands() == 0 && I->getNumOperands() == 0)
|
|
return haveSameSpecialState(this, I);
|
|
|
|
// We have two instructions of identical opcode and #operands. Check to see
|
|
// if all operands are the same.
|
|
if (!std::equal(op_begin(), op_end(), I->op_begin()))
|
|
return false;
|
|
|
|
if (const PHINode *thisPHI = dyn_cast<PHINode>(this)) {
|
|
const PHINode *otherPHI = cast<PHINode>(I);
|
|
return std::equal(thisPHI->block_begin(), thisPHI->block_end(),
|
|
otherPHI->block_begin());
|
|
}
|
|
|
|
return haveSameSpecialState(this, I);
|
|
}
|
|
|
|
// Keep this in sync with FunctionComparator::cmpOperations in
|
|
// lib/Transforms/IPO/MergeFunctions.cpp.
|
|
bool Instruction::isSameOperationAs(const Instruction *I,
|
|
unsigned flags) const {
|
|
bool IgnoreAlignment = flags & CompareIgnoringAlignment;
|
|
bool UseScalarTypes = flags & CompareUsingScalarTypes;
|
|
|
|
if (getOpcode() != I->getOpcode() ||
|
|
getNumOperands() != I->getNumOperands() ||
|
|
(UseScalarTypes ?
|
|
getType()->getScalarType() != I->getType()->getScalarType() :
|
|
getType() != I->getType()))
|
|
return false;
|
|
|
|
// We have two instructions of identical opcode and #operands. Check to see
|
|
// if all operands are the same type
|
|
for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
|
|
if (UseScalarTypes ?
|
|
getOperand(i)->getType()->getScalarType() !=
|
|
I->getOperand(i)->getType()->getScalarType() :
|
|
getOperand(i)->getType() != I->getOperand(i)->getType())
|
|
return false;
|
|
|
|
return haveSameSpecialState(this, I, IgnoreAlignment);
|
|
}
|
|
|
|
bool Instruction::isUsedOutsideOfBlock(const BasicBlock *BB) const {
|
|
for (const Use &U : uses()) {
|
|
// PHI nodes uses values in the corresponding predecessor block. For other
|
|
// instructions, just check to see whether the parent of the use matches up.
|
|
const Instruction *I = cast<Instruction>(U.getUser());
|
|
const PHINode *PN = dyn_cast<PHINode>(I);
|
|
if (!PN) {
|
|
if (I->getParent() != BB)
|
|
return true;
|
|
continue;
|
|
}
|
|
|
|
if (PN->getIncomingBlock(U) != BB)
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
bool Instruction::mayReadFromMemory() const {
|
|
switch (getOpcode()) {
|
|
default: return false;
|
|
case Instruction::VAArg:
|
|
case Instruction::Load:
|
|
case Instruction::Fence: // FIXME: refine definition of mayReadFromMemory
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::CatchPad:
|
|
case Instruction::CatchRet:
|
|
return true;
|
|
case Instruction::Call:
|
|
case Instruction::Invoke:
|
|
case Instruction::CallBr:
|
|
return !cast<CallBase>(this)->doesNotReadMemory();
|
|
case Instruction::Store:
|
|
return !cast<StoreInst>(this)->isUnordered();
|
|
}
|
|
}
|
|
|
|
bool Instruction::mayWriteToMemory() const {
|
|
switch (getOpcode()) {
|
|
default: return false;
|
|
case Instruction::Fence: // FIXME: refine definition of mayWriteToMemory
|
|
case Instruction::Store:
|
|
case Instruction::VAArg:
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::CatchPad:
|
|
case Instruction::CatchRet:
|
|
return true;
|
|
case Instruction::Call:
|
|
case Instruction::Invoke:
|
|
case Instruction::CallBr:
|
|
return !cast<CallBase>(this)->onlyReadsMemory();
|
|
case Instruction::Load:
|
|
return !cast<LoadInst>(this)->isUnordered();
|
|
}
|
|
}
|
|
|
|
bool Instruction::isAtomic() const {
|
|
switch (getOpcode()) {
|
|
default:
|
|
return false;
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::Fence:
|
|
return true;
|
|
case Instruction::Load:
|
|
return cast<LoadInst>(this)->getOrdering() != AtomicOrdering::NotAtomic;
|
|
case Instruction::Store:
|
|
return cast<StoreInst>(this)->getOrdering() != AtomicOrdering::NotAtomic;
|
|
}
|
|
}
|
|
|
|
bool Instruction::hasAtomicLoad() const {
|
|
assert(isAtomic());
|
|
switch (getOpcode()) {
|
|
default:
|
|
return false;
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::Load:
|
|
return true;
|
|
}
|
|
}
|
|
|
|
bool Instruction::hasAtomicStore() const {
|
|
assert(isAtomic());
|
|
switch (getOpcode()) {
|
|
default:
|
|
return false;
|
|
case Instruction::AtomicCmpXchg:
|
|
case Instruction::AtomicRMW:
|
|
case Instruction::Store:
|
|
return true;
|
|
}
|
|
}
|
|
|
|
bool Instruction::mayThrow() const {
|
|
if (const CallInst *CI = dyn_cast<CallInst>(this))
|
|
return !CI->doesNotThrow();
|
|
if (const auto *CRI = dyn_cast<CleanupReturnInst>(this))
|
|
return CRI->unwindsToCaller();
|
|
if (const auto *CatchSwitch = dyn_cast<CatchSwitchInst>(this))
|
|
return CatchSwitch->unwindsToCaller();
|
|
return isa<ResumeInst>(this);
|
|
}
|
|
|
|
bool Instruction::isSafeToRemove() const {
|
|
return (!isa<CallInst>(this) || !this->mayHaveSideEffects()) &&
|
|
!this->isTerminator();
|
|
}
|
|
|
|
bool Instruction::isLifetimeStartOrEnd() const {
|
|
auto II = dyn_cast<IntrinsicInst>(this);
|
|
if (!II)
|
|
return false;
|
|
Intrinsic::ID ID = II->getIntrinsicID();
|
|
return ID == Intrinsic::lifetime_start || ID == Intrinsic::lifetime_end;
|
|
}
|
|
|
|
const Instruction *Instruction::getNextNonDebugInstruction() const {
|
|
for (const Instruction *I = getNextNode(); I; I = I->getNextNode())
|
|
if (!isa<DbgInfoIntrinsic>(I))
|
|
return I;
|
|
return nullptr;
|
|
}
|
|
|
|
const Instruction *Instruction::getPrevNonDebugInstruction() const {
|
|
for (const Instruction *I = getPrevNode(); I; I = I->getPrevNode())
|
|
if (!isa<DbgInfoIntrinsic>(I))
|
|
return I;
|
|
return nullptr;
|
|
}
|
|
|
|
bool Instruction::isAssociative() const {
|
|
unsigned Opcode = getOpcode();
|
|
if (isAssociative(Opcode))
|
|
return true;
|
|
|
|
switch (Opcode) {
|
|
case FMul:
|
|
case FAdd:
|
|
return cast<FPMathOperator>(this)->hasAllowReassoc() &&
|
|
cast<FPMathOperator>(this)->hasNoSignedZeros();
|
|
default:
|
|
return false;
|
|
}
|
|
}
|
|
|
|
unsigned Instruction::getNumSuccessors() const {
|
|
switch (getOpcode()) {
|
|
#define HANDLE_TERM_INST(N, OPC, CLASS) \
|
|
case Instruction::OPC: \
|
|
return static_cast<const CLASS *>(this)->getNumSuccessors();
|
|
#include "llvm/IR/Instruction.def"
|
|
default:
|
|
break;
|
|
}
|
|
llvm_unreachable("not a terminator");
|
|
}
|
|
|
|
BasicBlock *Instruction::getSuccessor(unsigned idx) const {
|
|
switch (getOpcode()) {
|
|
#define HANDLE_TERM_INST(N, OPC, CLASS) \
|
|
case Instruction::OPC: \
|
|
return static_cast<const CLASS *>(this)->getSuccessor(idx);
|
|
#include "llvm/IR/Instruction.def"
|
|
default:
|
|
break;
|
|
}
|
|
llvm_unreachable("not a terminator");
|
|
}
|
|
|
|
void Instruction::setSuccessor(unsigned idx, BasicBlock *B) {
|
|
switch (getOpcode()) {
|
|
#define HANDLE_TERM_INST(N, OPC, CLASS) \
|
|
case Instruction::OPC: \
|
|
return static_cast<CLASS *>(this)->setSuccessor(idx, B);
|
|
#include "llvm/IR/Instruction.def"
|
|
default:
|
|
break;
|
|
}
|
|
llvm_unreachable("not a terminator");
|
|
}
|
|
|
|
void Instruction::replaceSuccessorWith(BasicBlock *OldBB, BasicBlock *NewBB) {
|
|
for (unsigned Idx = 0, NumSuccessors = Instruction::getNumSuccessors();
|
|
Idx != NumSuccessors; ++Idx)
|
|
if (getSuccessor(Idx) == OldBB)
|
|
setSuccessor(Idx, NewBB);
|
|
}
|
|
|
|
Instruction *Instruction::cloneImpl() const {
|
|
llvm_unreachable("Subclass of Instruction failed to implement cloneImpl");
|
|
}
|
|
|
|
void Instruction::swapProfMetadata() {
|
|
MDNode *ProfileData = getMetadata(LLVMContext::MD_prof);
|
|
if (!ProfileData || ProfileData->getNumOperands() != 3 ||
|
|
!isa<MDString>(ProfileData->getOperand(0)))
|
|
return;
|
|
|
|
MDString *MDName = cast<MDString>(ProfileData->getOperand(0));
|
|
if (MDName->getString() != "branch_weights")
|
|
return;
|
|
|
|
// The first operand is the name. Fetch them backwards and build a new one.
|
|
Metadata *Ops[] = {ProfileData->getOperand(0), ProfileData->getOperand(2),
|
|
ProfileData->getOperand(1)};
|
|
setMetadata(LLVMContext::MD_prof,
|
|
MDNode::get(ProfileData->getContext(), Ops));
|
|
}
|
|
|
|
void Instruction::copyMetadata(const Instruction &SrcInst,
|
|
ArrayRef<unsigned> WL) {
|
|
if (!SrcInst.hasMetadata())
|
|
return;
|
|
|
|
DenseSet<unsigned> WLS;
|
|
for (unsigned M : WL)
|
|
WLS.insert(M);
|
|
|
|
// Otherwise, enumerate and copy over metadata from the old instruction to the
|
|
// new one.
|
|
SmallVector<std::pair<unsigned, MDNode *>, 4> TheMDs;
|
|
SrcInst.getAllMetadataOtherThanDebugLoc(TheMDs);
|
|
for (const auto &MD : TheMDs) {
|
|
if (WL.empty() || WLS.count(MD.first))
|
|
setMetadata(MD.first, MD.second);
|
|
}
|
|
if (WL.empty() || WLS.count(LLVMContext::MD_dbg))
|
|
setDebugLoc(SrcInst.getDebugLoc());
|
|
}
|
|
|
|
Instruction *Instruction::clone() const {
|
|
Instruction *New = nullptr;
|
|
switch (getOpcode()) {
|
|
default:
|
|
llvm_unreachable("Unhandled Opcode.");
|
|
#define HANDLE_INST(num, opc, clas) \
|
|
case Instruction::opc: \
|
|
New = cast<clas>(this)->cloneImpl(); \
|
|
break;
|
|
#include "llvm/IR/Instruction.def"
|
|
#undef HANDLE_INST
|
|
}
|
|
|
|
New->SubclassOptionalData = SubclassOptionalData;
|
|
New->copyMetadata(*this);
|
|
return New;
|
|
}
|
|
|
|
void Instruction::setProfWeight(uint64_t W) {
|
|
assert(isa<CallBase>(this) &&
|
|
"Can only set weights for call like instructions");
|
|
SmallVector<uint32_t, 1> Weights;
|
|
Weights.push_back(W);
|
|
MDBuilder MDB(getContext());
|
|
setMetadata(LLVMContext::MD_prof, MDB.createBranchWeights(Weights));
|
|
}
|