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17e97fbf13
The 'common' section TLS is not implemented. Current C/C++ TLS variables are not placed in common section. DWARF debug info to get the address of TLS variables is not generated yet. clang and driver changes in http://reviews.llvm.org/D10524 Added -femulated-tls flag to select the emulated TLS model, which will be used for old targets like Android that do not support ELF TLS models. Added TargetLowering::LowerToTLSEmulatedModel as a target-independent function to convert a SDNode of TLS variable address to a function call to __emutls_get_address. Added into lib/Target/*/*ISelLowering.cpp to call LowerToTLSEmulatedModel for TLSModel::Emulated. Although all targets supporting ELF TLS models are enhanced, emulated TLS model has been tested only for Android ELF targets. Modified AsmPrinter.cpp to print the emutls_v.* and emutls_t.* variables for emulated TLS variables. Modified DwarfCompileUnit.cpp to skip some DIE for emulated TLS variabls. TODO: Add proper DIE for emulated TLS variables. Added new unit tests with emulated TLS. Differential Revision: http://reviews.llvm.org/D10522 llvm-svn: 243438
169 lines
3.9 KiB
LLVM
169 lines
3.9 KiB
LLVM
; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
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; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
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; Use my_emutls_get_address like __emutls_get_address.
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@my_emutls_v_xyz = external global i8*, align 4
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declare i8* @my_emutls_get_address(i8*)
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define i32 @my_get_xyz() {
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; X32-LABEL: my_get_xyz:
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; X32: movl my_emutls_v_xyz@GOT(%ebx), %eax
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; X32-NEXT: movl %eax, (%esp)
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; X32-NEXT: calll my_emutls_get_address@PLT
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; X64-LABEL: my_get_xyz:
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; X64: movq my_emutls_v_xyz@GOTPCREL(%rip), %rdi
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; X64-NEXT: callq my_emutls_get_address@PLT
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; X64-NEXT: movl (%rax), %eax
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entry:
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%call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
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%0 = bitcast i8* %call to i32*
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%1 = load i32, i32* %0, align 4
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ret i32 %1
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}
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@i = thread_local global i32 15
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@j = internal thread_local global i32 42
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@k = internal thread_local global i32 0, align 8
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define i32 @f1() {
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entry:
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%tmp1 = load i32, i32* @i
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ret i32 %tmp1
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}
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; X32-LABEL: f1:
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; X32: movl __emutls_v.i@GOT(%ebx), %eax
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; X32-NEXT: movl %eax, (%esp)
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; X32-NEXT: calll __emutls_get_address@PLT
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; X64-LABEL: f1:
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; X64: movq __emutls_v.i@GOTPCREL(%rip), %rdi
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; X64-NEXT: callq __emutls_get_address@PLT
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; X64-NEXT: movl (%rax), %eax
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@i2 = external thread_local global i32
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define i32* @f2() {
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entry:
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ret i32* @i
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}
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; X32-LABEL: f2:
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; X64-LABEL: f2:
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define i32 @f3() {
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entry:
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%tmp1 = load i32, i32* @i ; <i32> [#uses=1]
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ret i32 %tmp1
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}
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; X32-LABEL: f3:
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; X64-LABEL: f3:
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define i32* @f4() nounwind {
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entry:
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ret i32* @i
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}
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; X32-LABEL: f4:
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; X64-LABEL: f4:
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define i32 @f5() nounwind {
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entry:
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%0 = load i32, i32* @j, align 4
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%1 = load i32, i32* @k, align 4
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%add = add nsw i32 %0, %1
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ret i32 %add
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}
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; X32-LABEL: f5:
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; X32: movl __emutls_v.j@GOT(%ebx), %eax
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; X32-NEXT: movl %eax, (%esp)
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; X32-NEXT: calll __emutls_get_address@PLT
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; X32-NEXT: movl (%eax), %esi
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; X32-NEXT: movl __emutls_v.k@GOT(%ebx), %eax
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; X32-NEXT: movl %eax, (%esp)
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; X32-NEXT: calll __emutls_get_address@PLT
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; X32-NEXT: addl (%eax), %esi
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; X32-NEXT: movl %esi, %eax
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; X64-LABEL: f5:
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; X64: movq __emutls_v.j@GOTPCREL(%rip), %rdi
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; X64-NEXT: callq __emutls_get_address@PLT
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; X64-NEXT: movl (%rax), %ebx
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; X64-NEXT: movq __emutls_v.k@GOTPCREL(%rip), %rdi
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; X64-NEXT: callq __emutls_get_address@PLT
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; X64-NEXT: addl (%rax), %ebx
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; X64-NEXT: movl %ebx, %eax
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;;;;; 32-bit targets
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; X32: .section .data.rel.local,
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; X32-LABEL: __emutls_v.i:
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; X32-NEXT: .long 4
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; X32-NEXT: .long 4
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; X32-NEXT: .long 0
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; X32-NEXT: .long __emutls_t.i
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; X32: .section .rodata,
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; X32-LABEL: __emutls_t.i:
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; X32-NEXT: .long 15
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; X32: .section .data.rel.local,
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; X32-LABEL: __emutls_v.j:
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; X32-NEXT: .long 4
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; X32-NEXT: .long 4
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; X32-NEXT: .long 0
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; X32-NEXT: .long __emutls_t.j
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; X32: .section .rodata,
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; X32-LABEL: __emutls_t.j:
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; X32-NEXT: .long 42
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; X32: .data
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; X32-LABEL: __emutls_v.k:
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; X32-NEXT: .long 4
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; X32-NEXT: .long 8
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; X32-NEXT: .long 0
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; X32-NEXT: .long 0
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; X32-NOT: __emutls_t.k:
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;;;;; 64-bit targets
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; X64: .section .data.rel.local,
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; X64-LABEL: __emutls_v.i:
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 0
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; X64-NEXT: .quad __emutls_t.i
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; X64: .section .rodata,
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; X64-LABEL: __emutls_t.i:
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; X64-NEXT: .long 15
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; X64: .section .data.rel.local,
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; X64-LABEL: __emutls_v.j:
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 0
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; X64-NEXT: .quad __emutls_t.j
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; X64: .section .rodata,
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; X64-LABEL: __emutls_t.j:
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; X64-NEXT: .long 42
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; X64: .data
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; X64-LABEL: __emutls_v.k:
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; X64-NEXT: .quad 4
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; X64-NEXT: .quad 8
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; X64-NEXT: .quad 0
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; X64-NEXT: .quad 0
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; X64-NOT: __emutls_t.k:
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