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e16dd06466
If an inline asm statement clobbers a VSX register that overlaps with a callee-saved Altivec register or FPR, we will not record the clobber and will therefore violate the ABI. This is clearly a bug so this patch fixes it. Differential revision: https://reviews.llvm.org/D68576
33 lines
1.1 KiB
LLVM
33 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
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; RUN: -verify-machineinstrs -ppc-vsr-nums-as-vr \
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; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
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define dso_local void @clobberVR(<4 x i32> %a, <4 x i32> %b) local_unnamed_addr {
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; CHECK-LABEL: clobberVR:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: stxv v22, -160(r1) # 16-byte Folded Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: lxv v22, -160(r1) # 16-byte Folded Reload
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; CHECK-NEXT: blr
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entry:
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tail call void asm sideeffect "nop", "~{vs54}"()
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ret void
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}
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define dso_local void @clobberFPR(<4 x i32> %a, <4 x i32> %b) local_unnamed_addr {
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; CHECK-LABEL: clobberFPR:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: stfd f14, -144(r1) # 8-byte Folded Spill
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: lfd f14, -144(r1) # 8-byte Folded Reload
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; CHECK-NEXT: blr
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entry:
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tail call void asm sideeffect "nop", "~{vs14}"()
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ret void
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}
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