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https://github.com/RPCS3/llvm-mirror.git
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b09bb79732
Update CodeGen regression tests with marker at first line telling it's auto-generated by the script, under PowerPC directory. For some reason, these tests are generated but manually written, which makes things unclear when someone's change affecting them. However, some tests only show simple change after re-generated, like extra blank lines, disappearing '.localentry', etc. Besides, some tests are generated but added checks for debug output. This commit doesn't try updating them.
189 lines
5.8 KiB
LLVM
189 lines
5.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=CHECK
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@var_char = external thread_local local_unnamed_addr global i8, align 1
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@var_short = external thread_local local_unnamed_addr global i16, align 2
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@var_int = external thread_local local_unnamed_addr global i32, align 4
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@var_long_long = external thread_local local_unnamed_addr global i64, align 8
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define dso_local zeroext i8 @test_char_one() {
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; CHECK-LABEL: test_char_one:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 3, 2, var_char@got@tprel@ha
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; CHECK-NEXT: ld 3, var_char@got@tprel@l(3)
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; CHECK-NEXT: lbzx 3, 3, var_char@tls
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; CHECK-NEXT: blr
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entry:
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%0 = load i8, i8* @var_char, align 1, !tbaa !4
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ret i8 %0
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}
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define dso_local void @test_char_two(i32 signext %a) {
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; CHECK-LABEL: test_char_two:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, var_char@got@tprel@ha
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; CHECK-NEXT: ld 4, var_char@got@tprel@l(4)
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; CHECK-NEXT: stbx 3, 4, var_char@tls
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; CHECK-NEXT: blr
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entry:
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%conv = trunc i32 %a to i8
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store i8 %conv, i8* @var_char, align 1, !tbaa !4
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ret void
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}
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define dso_local zeroext i8 @test_char_three(i8 zeroext %a) {
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; CHECK-LABEL: test_char_three:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, var_char@got@tprel@ha
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; CHECK-NEXT: ld 4, var_char@got@tprel@l(4)
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; CHECK-NEXT: lbzx 5, 4, var_char@tls
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; CHECK-NEXT: add 5, 5, 3
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; CHECK-NEXT: clrldi 3, 5, 56
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; CHECK-NEXT: stbx 5, 4, var_char@tls
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; CHECK-NEXT: blr
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entry:
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%0 = load i8, i8* @var_char, align 1, !tbaa !4
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%add = add i8 %0, %a
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store i8 %add, i8* @var_char, align 1, !tbaa !4
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ret i8 %add
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}
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define dso_local signext i16 @test_short_one() {
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; CHECK-LABEL: test_short_one:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 3, 2, var_short@got@tprel@ha
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; CHECK-NEXT: ld 3, var_short@got@tprel@l(3)
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; CHECK-NEXT: lhzx 3, 3, var_short@tls
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; CHECK-NEXT: blr
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entry:
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%0 = load i16, i16* @var_short, align 2, !tbaa !7
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ret i16 %0
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}
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define dso_local void @test_short_two(i32 signext %a) {
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; CHECK-LABEL: test_short_two:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, var_short@got@tprel@ha
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; CHECK-NEXT: ld 4, var_short@got@tprel@l(4)
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; CHECK-NEXT: sthx 3, 4, var_short@tls
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; CHECK-NEXT: blr
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entry:
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%conv = trunc i32 %a to i16
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store i16 %conv, i16* @var_short, align 2, !tbaa !7
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ret void
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}
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define dso_local signext i16 @test_short_three(i16 signext %a) {
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; CHECK-LABEL: test_short_three:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, var_short@got@tprel@ha
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; CHECK-NEXT: ld 4, var_short@got@tprel@l(4)
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; CHECK-NEXT: lhzx 5, 4, var_short@tls
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; CHECK-NEXT: add 5, 5, 3
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; CHECK-NEXT: extsh 3, 5
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; CHECK-NEXT: sthx 5, 4, var_short@tls
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; CHECK-NEXT: blr
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entry:
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%0 = load i16, i16* @var_short, align 2, !tbaa !7
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%add = add i16 %0, %a
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store i16 %add, i16* @var_short, align 2, !tbaa !7
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ret i16 %add
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}
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define dso_local signext i32 @test_int_one() {
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; CHECK-LABEL: test_int_one:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 3, 2, var_int@got@tprel@ha
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; CHECK-NEXT: ld 3, var_int@got@tprel@l(3)
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; CHECK-NEXT: lwzx 3, 3, var_int@tls
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; CHECK-NEXT: blr
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entry:
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%0 = load i32, i32* @var_int, align 4, !tbaa !9
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ret i32 %0
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}
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define dso_local void @test_int_two(i32 signext %a) {
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; CHECK-LABEL: test_int_two:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, var_int@got@tprel@ha
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; CHECK-NEXT: ld 4, var_int@got@tprel@l(4)
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; CHECK-NEXT: stwx 3, 4, var_int@tls
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; CHECK-NEXT: blr
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entry:
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store i32 %a, i32* @var_int, align 4, !tbaa !9
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ret void
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}
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define dso_local signext i32 @test_int_three(i32 signext %a) {
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; CHECK-LABEL: test_int_three:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, var_int@got@tprel@ha
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; CHECK-NEXT: ld 4, var_int@got@tprel@l(4)
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; CHECK-NEXT: lwzx 5, 4, var_int@tls
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; CHECK-NEXT: add 5, 5, 3
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; CHECK-NEXT: extsw 3, 5
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; CHECK-NEXT: stwx 5, 4, var_int@tls
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; CHECK-NEXT: blr
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entry:
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%0 = load i32, i32* @var_int, align 4, !tbaa !9
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%add = add nsw i32 %0, %a
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store i32 %add, i32* @var_int, align 4, !tbaa !9
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ret i32 %add
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}
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define dso_local i64 @test_longlong_one() {
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; CHECK-LABEL: test_longlong_one:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 3, 2, var_long_long@got@tprel@ha
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; CHECK-NEXT: ld 3, var_long_long@got@tprel@l(3)
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; CHECK-NEXT: ldx 3, 3, var_long_long@tls
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; CHECK-NEXT: blr
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entry:
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%0 = load i64, i64* @var_long_long, align 8, !tbaa !11
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ret i64 %0
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}
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define dso_local void @test_longlong_two(i32 signext %a) {
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; CHECK-LABEL: test_longlong_two:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, var_long_long@got@tprel@ha
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; CHECK-NEXT: ld 4, var_long_long@got@tprel@l(4)
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; CHECK-NEXT: stdx 3, 4, var_long_long@tls
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; CHECK-NEXT: blr
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entry:
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%conv = sext i32 %a to i64
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store i64 %conv, i64* @var_long_long, align 8, !tbaa !11
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ret void
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}
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define dso_local i64 @test_longlong_three(i64 %a) {
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; CHECK-LABEL: test_longlong_three:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: addis 4, 2, var_long_long@got@tprel@ha
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; CHECK-NEXT: ld 4, var_long_long@got@tprel@l(4)
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; CHECK-NEXT: ldx 5, 4, var_long_long@tls
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; CHECK-NEXT: add 3, 5, 3
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; CHECK-NEXT: stdx 3, 4, var_long_long@tls
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; CHECK-NEXT: blr
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entry:
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%0 = load i64, i64* @var_long_long, align 8, !tbaa !11
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%add = add nsw i64 %0, %a
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store i64 %add, i64* @var_long_long, align 8, !tbaa !11
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ret i64 %add
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}
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!llvm.module.flags = !{!0, !1, !2}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 7, !"PIC Level", i32 1}
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!2 = !{i32 7, !"PIE Level", i32 1}
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!4 = !{!5, !5, i64 0}
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!5 = !{!"omnipotent char", !6, i64 0}
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!6 = !{!"Simple C/C++ TBAA"}
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!7 = !{!8, !8, i64 0}
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!8 = !{!"short", !5, i64 0}
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!9 = !{!10, !10, i64 0}
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!10 = !{!"int", !5, i64 0}
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!11 = !{!12, !12, i64 0}
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!12 = !{!"long long", !5, i64 0}
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