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When the input to a store instruction was a zero vector, the backend always selected a normal vector store regardless of the non-temporal hint. This is fixed by this patch. This fixes PR19370. llvm-svn: 220054
32 lines
897 B
LLVM
32 lines
897 B
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX
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; Make sure that we generate non-temporal stores for the test cases below.
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define void @test1(<4 x float>* %dst) {
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; CHECK-LABEL: test1:
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; SSE: movntps
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; AVX: vmovntps
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store <4 x float> zeroinitializer, <4 x float>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test2(<4 x i32>* %dst) {
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; CHECK-LABEL: test2:
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; SSE: movntps
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; AVX: vmovntps
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store <4 x i32> zeroinitializer, <4 x i32>* %dst, align 16, !nontemporal !1
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ret void
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}
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define void @test3(<2 x double>* %dst) {
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; CHECK-LABEL: test3:
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; SSE: movntps
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; AVX: vmovntps
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store <2 x double> zeroinitializer, <2 x double>* %dst, align 16, !nontemporal !1
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ret void
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}
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!1 = metadata !{i32 1}
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