Simon Pilgrim 8918e04a27 [X86][SSE] Add 256-bit vector bit rotation tests. ... llvm-svn: 250853		2015-10-20 20:27:23 +00:00
..
AArch64	[AArch64]Merge halfword loads into a 32-bit load	2015-10-19 18:34:53 +00:00
AMDGPU	AMDGPU: Stop reserving v[254:255]	2015-10-20 03:59:58 +00:00
ARM	Adding support for TargetLoweringBase::LibCall	2015-10-20 13:14:52 +00:00
BPF	[bpf] Do not expand UNDEF SDNode during insn selection lowering	2015-10-08 18:52:40 +00:00
CPP
Generic	[Hexagon] Reverting test file change.	2015-10-17 01:58:51 +00:00
Hexagon	[Hexagon] Delay emission of CFI instructions	2015-10-19 17:46:01 +00:00
Inputs
Mips	[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.	2015-10-15 14:34:23 +00:00
MIR	[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.	2015-10-15 14:34:23 +00:00
MSP430
NVPTX
PowerPC	[MachO] Stop generating *coal* sections.	2015-10-15 05:28:38 +00:00
SPARC	Fix assert when emitting llvm.pow.f86.	2015-10-09 21:36:19 +00:00
SystemZ	[SystemZ] Comment fix in test/CodeGen/SystemZ/fp-cmp-05.ll	2015-10-20 15:05:54 +00:00
Thumb
Thumb2	[ARM] Use correct half-precision functions in EABI mode	2015-10-07 16:58:49 +00:00
WebAssembly	WebAssembly: fix call/return syntax.	2015-10-20 01:26:54 +00:00
WinEH	[WinEH] Fix eh.exceptionpointer intrinsic lowering	2015-10-17 00:08:08 +00:00
X86	[X86][SSE] Add 256-bit vector bit rotation tests.	2015-10-20 20:27:23 +00:00
XCore