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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 05:52:53 +02:00
llvm-mirror/test/CodeGen
Tom Stellard 6245c9db08 AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits
This was supposed to be part of r268143.

llvm-svn: 268154
2016-04-30 04:04:48 +00:00
..
AArch64 [AArch64] Set correct successors in CMPXCHG pseudo expansion. 2016-04-27 20:33:02 +00:00
AMDGPU AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits 2016-04-30 04:04:48 +00:00
ARM [ARM] Set correct successors in CMPXCHG pseudo expansion. 2016-04-27 20:32:54 +00:00
BPF
CPP
Generic Introduce llvm.load.relative intrinsic. 2016-04-22 21:18:02 +00:00
Hexagon [Hexagon] Optimize addressing modes for load/store 2016-04-29 15:49:13 +00:00
Inputs [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
Lanai [lanai] Add subword scheduling itineraries. 2016-04-20 18:28:55 +00:00
Mips [mips][FastISel] A store is not a load. 2016-04-29 16:07:47 +00:00
MIR tests: tweak MIR for ARM tests to correct MI issues 2016-04-26 17:54:21 +00:00
MSP430
NVPTX [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
PowerPC [MBP] Use Function::optForSize() instead of checking OptimizeForSize directly. 2016-04-29 22:01:10 +00:00
SPARC [SPARC] [SSP] Add support for LOAD_STACK_GUARD. 2016-04-26 10:37:14 +00:00
SystemZ DAGCombiner: Reduce truncated shl width 2016-04-29 19:53:16 +00:00
Thumb [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
Thumb2
WebAssembly [WebAssembly] Account for implicit operands when computing operand indices. 2016-04-26 01:40:56 +00:00
WinEH [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00
X86 [MBP] Use Function::optForSize() instead of checking OptimizeForSize directly. 2016-04-29 22:01:10 +00:00
XCore [PR27284] Reverse the ownership between DICompileUnit and DISubprogram. 2016-04-15 15:57:41 +00:00