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156 lines
5.1 KiB
C++
156 lines
5.1 KiB
C++
/* Title: PhyRegAlloc.h
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Author: Ruchira Sasanka
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Date: Aug 20, 01
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Purpose: This is the main entry point for register allocation.
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Notes:
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* RegisterClasses: Each RegClass accepts a
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MachineRegClass which contains machine specific info about that register
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class. The code in the RegClass is machine independent and they use
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access functions in the MachineRegClass object passed into it to get
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machine specific info.
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* Machine dependent work: All parts of the register coloring algorithm
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except coloring of an individual node are machine independent.
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Register allocation must be done as:
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static const MachineRegInfo MRI = MachineRegInfo(); // machine reg info
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MethodLiveVarInfo LVI(*MethodI ); // compute LV info
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LVI.analyze();
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PhyRegAlloc PRA(*MethodI, &MRI, &LVI); // allocate regs
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PRA.allocateRegisters();
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Assumptions:
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All values in a live range will be of the same physical reg class.
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*/
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#ifndef PHY_REG_ALLOC_H
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#define PHY_REG_ALLOC_H
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/RegClass.h"
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#include "llvm/CodeGen/LiveRangeInfo.h"
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#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
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#include <deque>
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//----------------------------------------------------------------------------
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// Class AddedInstrns:
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// When register allocator inserts new instructions in to the existing
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// instruction stream, it does NOT directly modify the instruction stream.
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// Rather, it creates an object of AddedInstrns and stick it in the
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// AddedInstrMap for an existing instruction. This class contains two vectors
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// to store such instructions added before and after an existing instruction.
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//----------------------------------------------------------------------------
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class AddedInstrns
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{
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public:
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deque<MachineInstr *> InstrnsBefore; // Added insts BEFORE an existing inst
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deque<MachineInstr *> InstrnsAfter; // Added insts AFTER an existing inst
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AddedInstrns() : InstrnsBefore(), InstrnsAfter() { }
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};
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typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
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//----------------------------------------------------------------------------
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// class PhyRegAlloc:
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// Main class the register allocator. Call allocateRegisters() to allocate
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// registers for a Method.
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//----------------------------------------------------------------------------
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class PhyRegAlloc: public NonCopyable
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{
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vector<RegClass *> RegClassList ; // vector of register classes
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const TargetMachine &TM; // target machine
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const Method* Meth; // name of the method we work on
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MachineCodeForMethod& mcInfo; // descriptor for method's native code
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MethodLiveVarInfo *const LVI; // LV information for this method
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// (already computed for BBs)
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LiveRangeInfo LRI; // LR info (will be computed)
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const MachineRegInfo &MRI; // Machine Register information
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const unsigned NumOfRegClasses; // recorded here for efficiency
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//vector<const Instruction *> CallInstrList; // a list of all call instrs
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//vector<const Instruction *> RetInstrList; // a list of all return instrs
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AddedInstrMapType AddedInstrMap; // to store instrns added in this phase
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//vector<const MachineInstr *> PhiInstList; // a list of all phi instrs
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//------- private methods ---------------------------------------------------
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void addInterference(const Value *const Def, const LiveVarSet *const LVSet,
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const bool isCallInst);
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void addInterferencesForArgs();
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void createIGNodeListsAndIGs();
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void buildInterferenceGraphs();
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//void insertCallerSavingCode(const MachineInstr *MInst,
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// const BasicBlock *BB );
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void setCallInterferences(const MachineInstr *MInst,
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const LiveVarSet *const LVSetAft );
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void move2DelayedInstr(const MachineInstr *OrigMI,
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const MachineInstr *DelayedMI );
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void markUnusableSugColors();
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void allocateStackSpace4SpilledLRs();
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void insertCode4SpilledLR (const LiveRange *LR,
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MachineInstr *MInst,
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const BasicBlock *BB,
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const unsigned OpNum);
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inline void constructLiveRanges()
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{ LRI.constructLiveRanges(); }
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void colorIncomingArgs();
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void colorCallRetArgs();
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void updateMachineCode();
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void printLabel(const Value *const Val);
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void printMachineCode();
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friend class UltraSparcRegInfo;
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int getUsableRegAtMI(RegClass *RC, const int RegType, const MachineInstr *MInst,
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const LiveVarSet *LVSetBef, MachineInstr *MIBef,
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MachineInstr *MIAft );
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int getUnusedRegAtMI(RegClass *RC, const MachineInstr *MInst,
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const LiveVarSet *LVSetBef);
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void setRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
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int getRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);
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void addInterf4PseudoInstr(const MachineInstr *MInst);
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public:
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PhyRegAlloc(Method *const M, const TargetMachine& TM,
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MethodLiveVarInfo *const Lvi);
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void allocateRegisters(); // main method called for allocatin
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};
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#endif
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