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27 lines
721 B
LLVM
27 lines
721 B
LLVM
; RUN: llc < %s -march=cellspu | FileCheck %s
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define i32 @subword( i32 %param1, i32 %param2) {
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; Check ordering of registers ret=param1-param2 -> rt=rb-ra
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; CHECK-NOT: sf $3, $3, $4
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; CHECK: sf $3, $4, $3
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%1 = sub i32 %param1, %param2
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ret i32 %1
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}
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define i16 @subhword( i16 %param1, i16 %param2) {
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; Check ordering of registers ret=param1-param2 -> rt=rb-ra
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; CHECK-NOT: sfh $3, $3, $4
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; CHECK: sfh $3, $4, $3
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%1 = sub i16 %param1, %param2
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ret i16 %1
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}
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define float @subfloat( float %param1, float %param2) {
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; Check ordering of registers ret=param1-param2 -> rt=ra-rb
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; (yes this is reverse of i32 instruction)
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; CHECK-NOT: fs $3, $4, $3
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; CHECK: fs $3, $3, $4
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%1 = fsub float %param1, %param2
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ret float %1
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}
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