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47e8019142
is narrower than the shift register. Doing an anyext provides undefined bits in the top part of the register. llvm-svn: 125457
116 lines
2.4 KiB
LLVM
116 lines
2.4 KiB
LLVM
; Ensure that shifts are lowered to loops when the barrel shifter unit is
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; not available in the hardware and that loops are not used when the
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; barrel shifter unit is available in the hardware.
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;
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; RUN: llc < %s -march=mblaze | FileCheck -check-prefix=FUN %s
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; RUN: llc < %s -march=mblaze -mattr=+barrel | FileCheck -check-prefix=SHT %s
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define i8 @test_i8(i8 %a, i8 %b) {
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; FUN: test_i8:
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; SHT: test_i8:
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%tmp.1 = shl i8 %a, %b
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; FUN: andi
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; FUN: add
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; FUN: bnei
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; SHT-NOT: bnei
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ret i8 %tmp.1
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; FUN: rtsd
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; SHT: rtsd
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; FUN-NOT: bsll
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; SHT-NEXT: bsll
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}
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define i8 @testc_i8(i8 %a, i8 %b) {
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; FUN: testc_i8:
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; SHT: testc_i8:
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%tmp.1 = shl i8 %a, 5
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; FUN: andi
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; FUN: add
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; FUN: bnei
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; SHT-NOT: andi
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; SHT-NOT: add
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; SHT-NOT: bnei
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ret i8 %tmp.1
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; FUN: rtsd
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; SHT: rtsd
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; FUN-NOT: bsll
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; SHT-NEXT: bslli
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}
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define i16 @test_i16(i16 %a, i16 %b) {
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; FUN: test_i16:
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; SHT: test_i16:
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%tmp.1 = shl i16 %a, %b
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; FUN: andi
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; FUN: add
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; FUN: bnei
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; SHT-NOT: bnei
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ret i16 %tmp.1
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; FUN: rtsd
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; SHT: rtsd
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; FUN-NOT: bsll
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; SHT-NEXT: bsll
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}
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define i16 @testc_i16(i16 %a, i16 %b) {
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; FUN: testc_i16:
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; SHT: testc_i16:
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%tmp.1 = shl i16 %a, 5
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; FUN: andi
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; FUN: add
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; FUN: bnei
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; SHT-NOT: andi
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; SHT-NOT: add
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; SHT-NOT: bnei
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ret i16 %tmp.1
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; FUN: rtsd
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; SHT: rtsd
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; FUN-NOT: bsll
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; SHT-NEXT: bslli
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}
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define i32 @test_i32(i32 %a, i32 %b) {
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; FUN: test_i32:
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; SHT: test_i32:
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%tmp.1 = shl i32 %a, %b
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; FUN: andi
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; FUN: add
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; FUN: bnei
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; SHT-NOT: andi
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; SHT-NOT: bnei
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ret i32 %tmp.1
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; FUN: rtsd
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; SHT: rtsd
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; FUN-NOT: bsll
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; SHT-NEXT: bsll
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}
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define i32 @testc_i32(i32 %a, i32 %b) {
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; FUN: testc_i32:
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; SHT: testc_i32:
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%tmp.1 = shl i32 %a, 5
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; FUN: andi
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; FUN: add
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; FUN: bnei
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; SHT-NOT: andi
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; SHT-NOT: add
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; SHT-NOT: bnei
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ret i32 %tmp.1
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; FUN: rtsd
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; SHT: rtsd
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; FUN-NOT: bsll
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; SHT-NEXT: bslli
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}
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