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c00c3084e9
This patch add the ISD::LROUND and ISD::LLROUND along with new intrinsics. The changes are straightforward as for other floating-point rounding functions, with just some adjustments required to handle the return value being an interger. The idea is to optimize lround/llround generation for AArch64 in a subsequent patch. Current semantic is just route it to libm symbol. llvm-svn: 360889
57 lines
1.3 KiB
LLVM
57 lines
1.3 KiB
LLVM
; RUN: llc < %s -mtriple=mips64el -mattr=+soft-float | FileCheck %s
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define signext i32 @testmsws(float %x) {
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; CHECK-LABEL: testmsws:
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; CHECK: jal llroundf
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entry:
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%0 = tail call i64 @llvm.llround.f32(float %x)
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%conv = trunc i64 %0 to i32
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ret i32 %conv
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}
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define i64 @testmsxs(float %x) {
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; CHECK-LABEL: testmsxs:
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; CHECK: jal llroundf
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entry:
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%0 = tail call i64 @llvm.llround.f32(float %x)
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ret i64 %0
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}
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define signext i32 @testmswd(double %x) {
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; CHECK-LABEL: testmswd:
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; CHECK: jal llround
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entry:
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%0 = tail call i64 @llvm.llround.f64(double %x)
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%conv = trunc i64 %0 to i32
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ret i32 %conv
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}
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define i64 @testmsxd(double %x) {
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; CHECK-LABEL: testmsxd:
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; CHECK: jal llround
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entry:
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%0 = tail call i64 @llvm.llround.f64(double %x)
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ret i64 %0
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}
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define signext i32 @testmswl(fp128 %x) {
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; CHECK-LABEL: testmswl:
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; CHECK: jal llroundl
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entry:
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%0 = tail call i64 @llvm.llround.f128(fp128 %x)
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%conv = trunc i64 %0 to i32
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ret i32 %conv
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}
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define i64 @testmsll(fp128 %x) {
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; CHECK-LABEL: testmsll:
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; CHECK: jal llroundl
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entry:
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%0 = tail call i64 @llvm.llround.f128(fp128 %x)
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ret i64 %0
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}
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declare i64 @llvm.llround.f32(float) nounwind readnone
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declare i64 @llvm.llround.f64(double) nounwind readnone
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declare i64 @llvm.llround.f128(fp128) nounwind readnone
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