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llvm-mirror/test/CodeGen/Mips/micromips-addiu.ll
Daniel Sanders 76aeb9f378 [mips][micromips] Make getPointerRegClass() result depend on the instruction.
Summary:
Previously, it returned the GPR16MMRegClass for all instructions which was
incorrect for instructions like lwsp/lwgp and unnecesarily restricted the
permitted registers for instructions like lw32.

This fixes quite a few of the -verify-machineinstrs errors reported in PR27458.
I've only added -verify-machineinstrs to one test in this change since I
understand there is a plan to enable the verifier by default.

Reviewers: hvarga, zbuljan, zoran.jovanovic, sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D19873

llvm-svn: 268918
2016-05-09 13:38:25 +00:00

33 lines
1.1 KiB
LLVM

; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs \
; RUN: -relocation-model=pic -O3 < %s | FileCheck %s
@x = global i32 65504, align 4
@y = global i32 60929, align 4
@z = global i32 60929, align 4
@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1
define i32 @main() nounwind {
entry:
%0 = load i32, i32* @x, align 4
%addiu1 = add i32 %0, -7
%call1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds
([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 %addiu1)
%1 = load i32, i32* @y, align 4
%addiu2 = add i32 %1, 55
%call2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds
([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 %addiu2)
%2 = load i32, i32* @z, align 4
%addiu3 = add i32 %2, 24
%call3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds
([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 %addiu3)
ret i32 0
}
declare i32 @printf(i8*, ...)
; CHECK: addius5 ${{[0-9]+}}, -7
; CHECK: addiu ${{[0-9]+}}, ${{[0-9]+}}, 55
; CHECK: addiur2 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, 24