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a718ad096c
SCEV currently tries to prove implications of x pred y by also trying to imply ~y pred ~x. This is expensive in terms of compile-time (in fact, the majority of isImpliedCond compile-time is spent here) and generally not fruitful. The issue is that this also swaps the operands and thus breaks canonical ordering. If originally we were trying to prove an implication like X > C1 -> Y > C2, then we'll now try to prove X > C1 -> C3 > ~Y, which will not work. The only real case where we can get some use out of this transform is if the original conditions were in the form X > C1 -> Y < C2, were then swapped to X > C1 -> C2 > Y and are then swapped again here to X > C1 -> ~Y > C3. As such, handle this at a higher level, where we are doing the swapping in the first place. There's four different ways that we can line up a predicate and a swapped predicate, so we use some heuristics to pick some profitable way. Because we now try this transform at a higher level (isImpliedCondOperands rather than isImpliedCondOperandsHelper), we can also prove additional facts. Of the added tests, one was proven previously while the other wasn't. Differential Revision: https://reviews.llvm.org/D90926
29 lines
905 B
LLVM
29 lines
905 B
LLVM
; RUN: opt < %s -analyze -enable-new-pm=0 -scalar-evolution | FileCheck %s
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; RUN: opt < %s -disable-output "-passes=print<scalar-evolution>" 2>&1 | FileCheck %s
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; PR4569
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define i16 @main() nounwind {
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entry:
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br label %bb.i
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bb.i: ; preds = %bb1.i, %bb.nph
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; We should be able to find the range for this expression.
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; CHECK: %l_95.0.i1 = phi i8
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; CHECK: --> {0,+,-1}<%bb.i> U: [2,1) S: [2,1){{ *}}Exits: 2
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%l_95.0.i1 = phi i8 [ %tmp1, %bb.i ], [ 0, %entry ]
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; This cast shouldn't be folded into the addrec.
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; CHECK: %tmp = zext i8 %l_95.0.i1 to i16
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; CHECK: --> (zext i8 {0,+,-1}<%bb.i> to i16){{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: 2
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%tmp = zext i8 %l_95.0.i1 to i16
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%tmp1 = add i8 %l_95.0.i1, -1
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%phitmp = icmp eq i8 %tmp1, 1
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br i1 %phitmp, label %bb1.i.func_36.exit_crit_edge, label %bb.i
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bb1.i.func_36.exit_crit_edge:
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ret i16 %tmp
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}
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