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llvm-mirror/test/Transforms/GVNSink/dither.ll
James Molloy e219c46616 [GVNSink] GVNSink pass
This patch provides an initial prototype for a pass that sinks instructions based on GVN information, similar to GVNHoist. It is not yet ready for commiting but I've uploaded it to gather some initial thoughts.

This pass attempts to sink instructions into successors, reducing static
instruction count and enabling if-conversion.
We use a variant of global value numbering to decide what can be sunk.
Consider:

[ %a1 = add i32 %b, 1  ]   [ %c1 = add i32 %d, 1  ]
[ %a2 = xor i32 %a1, 1 ]   [ %c2 = xor i32 %c1, 1 ]
                 \           /
           [ %e = phi i32 %a2, %c2 ]
           [ add i32 %e, 4         ]

GVN would number %a1 and %c1 differently because they compute different
results - the VN of an instruction is a function of its opcode and the
transitive closure of its operands. This is the key property for hoisting
and CSE.

What we want when sinking however is for a numbering that is a function of
the *uses* of an instruction, which allows us to answer the question "if I
replace %a1 with %c1, will it contribute in an equivalent way to all
successive instructions?". The (new) PostValueTable class in GVN provides this
mapping.

This pass has some shown really impressive improvements especially for codesize already on internal benchmarks, so I have high hopes it can replace all the sinking logic in SimplifyCFG.

Differential revision: https://reviews.llvm.org/D24805

llvm-svn: 303850
2017-05-25 12:51:11 +00:00

43 lines
1.3 KiB
LLVM

; RUN: opt < %s -S -gvn-sink | FileCheck %s
; Because %tmp17 has flipped operands to its equivalents %tmp14 and %tmp7, we
; can't sink the zext as we'd need a shuffling PHI in between.
;
; Just sinking the zext isn't profitable, so ensure nothing is sunk.
; CHECK-LABEL: @hoge
; CHECK-NOT: bb18.gvnsink.split
define void @hoge() {
bb:
br i1 undef, label %bb4, label %bb11
bb4: ; preds = %bb3
br i1 undef, label %bb6, label %bb8
bb6: ; preds = %bb5
%tmp = zext i16 undef to i64
%tmp7 = add i64 %tmp, undef
br label %bb18
bb8: ; preds = %bb5
%tmp9 = zext i16 undef to i64
br label %bb18
bb11: ; preds = %bb10
br i1 undef, label %bb12, label %bb15
bb12: ; preds = %bb11
%tmp13 = zext i16 undef to i64
%tmp14 = add i64 %tmp13, undef
br label %bb18
bb15: ; preds = %bb11
%tmp16 = zext i16 undef to i64
%tmp17 = add i64 undef, %tmp16
br label %bb18
bb18: ; preds = %bb15, %bb12, %bb8, %bb6
%tmp19 = phi i64 [ %tmp7, %bb6 ], [ undef, %bb8 ], [ %tmp14, %bb12 ], [ %tmp17, %bb15 ]
unreachable
}