1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-24 21:42:54 +02:00
llvm-mirror/test/CodeGen/CellSPU/div_ops.ll
Kalle Raiskila f71cc94c91 Division by pow-of-2 is not cheap on SPU, do it with
shifts.

llvm-svn: 120022
2010-11-23 13:27:59 +00:00

23 lines
364 B
LLVM

; RUN: llc --march=cellspu %s -o - | FileCheck %s
; signed division rounds towards zero, rotma don't.
define i32 @sdivide (i32 %val )
{
; CHECK: rotmai
; CHECK: rotmi
; CHECK: a
; CHECK: rotmai
; CHECK: bi $lr
%rv = sdiv i32 %val, 4
ret i32 %rv
}
define i32 @udivide (i32 %val )
{
; CHECK: rotmi
; CHECK: bi $lr
%rv = udiv i32 %val, 4
ret i32 %rv
}